diff options
author | Ronald G. Minnich <rminnich@gmail.com> | 2004-02-10 21:34:18 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2004-02-10 21:34:18 +0000 |
commit | c4bea221e038e40044100875119ad4e5aad0876f (patch) | |
tree | 452fa8de62eefbe99d5a9d21ec6317fd33a321dd | |
parent | f69f7e252f1cca6a891dcaffcad763e91189e7b8 (diff) | |
download | coreboot-c4bea221e038e40044100875119ad4e5aad0876f.tar.xz |
now we support 8111 and these parts.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1375 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | util/flash_and_burn/flash.h | 3 | ||||
-rw-r--r-- | util/flash_and_burn/flash_rom.c | 84 | ||||
-rw-r--r-- | util/flash_and_burn/pm49fl004.c | 210 | ||||
-rw-r--r-- | util/flash_and_burn/pm49fl004.h | 8 |
4 files changed, 301 insertions, 4 deletions
diff --git a/util/flash_and_burn/flash.h b/util/flash_and_burn/flash.h index 0e62b89753..ace46a4f5d 100644 --- a/util/flash_and_burn/flash.h +++ b/util/flash_and_burn/flash.h @@ -37,6 +37,9 @@ struct flashchip { #define SST_39SF020 0xB6 /* SST 39SF020 device */ #define SST_39VF020 0xD6 /* SST 39SF020 device */ +#define PMC_ID 0x9D /* PMC Manufacturer ID[B code */ +#define PMC_49FL004 0x6E /* PMC 49FL004 device code */ + #define WINBOND_ID 0xDA /* Winbond Manufacture ID code */ #define W_29C011 0xC1 /* Winbond w29c011 device code*/ #define W_29C020C 0x45 /* Winbond w29c020c device code*/ diff --git a/util/flash_and_burn/flash_rom.c b/util/flash_and_burn/flash_rom.c index a13d48bb51..b063b3c1f4 100644 --- a/util/flash_and_burn/flash_rom.c +++ b/util/flash_and_burn/flash_rom.c @@ -46,10 +46,12 @@ #include "sst28sf040.h" #include "w49f002u.h" #include "sst39sf020.h" +#include "pm49fl004.h" #include "mx29f002.h" struct flashchip flashchips[] = { - {"Am29F040B", AMD_ID, AM_29F040B, NULL, 512, 64*1024, +#if 1 + {"Am29F040B", AMD_ID, AM_29F040B, NULL, 512, 64*1024, probe_29f040b, erase_29f040b, write_29f040b, NULL}, {"At29C040A", ATMEL_ID, AT_29C040A, NULL, 512, 256, probe_jedec, erase_jedec, write_jedec, NULL}, @@ -63,6 +65,12 @@ struct flashchip flashchips[] = { probe_39sf020, erase_39sf020, write_39sf020, NULL}, {"SST39VF020", SST_ID, SST_39VF020, NULL, 256, 4096, probe_39sf020, erase_39sf020, write_39sf020, NULL}, +#endif +//By LYH begin + {"Pm49FL004", PMC_ID, PMC_49FL004, NULL, 512, 64*1024, + probe_49fl004, erase_49fl004, write_49fl004, NULL}, +//END +#if 1 {"W29C011", WINBOND_ID, W_29C011, NULL, 128, 128, probe_jedec, erase_jedec, write_jedec, NULL}, {"W29C020C", WINBOND_ID, W_29C020C, NULL, 256, 128, @@ -80,10 +88,11 @@ struct flashchip flashchips[] = { NULL, 8, 8*1024, probe_md2802, erase_md2802, write_md2802, read_md2802}, {NULL,} +#endif }; char *chip_to_probe = NULL; - +#if 1 int enable_flash_sis630 (struct pci_dev *dev, char *name) { char b; @@ -271,6 +280,71 @@ enable_flash_sis5595(struct pci_dev *dev, char *name) { } return 0; } +#endif +//BY LYH +#if 0 +static void dump_pci_device(struct pci_dev *dev) +{ + int i; + + printf("\n"); + for(i = 0; i <= 255; i++) { + unsigned char val; + if ((i & 0x0f) == 0) { + printf("0x%02x:",i); + } + val = pci_read_byte(dev, i); + printf(" 0x%02x",val); + if ((i & 0x0f) == 0x0f) { + printf("\r\n"); + } + } +} + +#endif + +int +enable_flash_amd8111(struct pci_dev *dev, char *name) { + /* register 4e.b gets or'ed with one */ + unsigned char old, new; + /* if it fails, it fails. There are so many variations of broken mobos + * that it is hard to argue that we should quit at this point. + */ + +// dump_pci_device(dev); + + old = pci_read_byte(dev, 0x43); + + new = old | 0x80; + + if (new != old) { + + pci_write_byte(dev, 0x43, new); + + if (pci_read_byte(dev, 0x43) != new) { + printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", + 0x43, new, name); + } + } + + + old = pci_read_byte(dev, 0x40); + + new = old | 0x01; + + if (new == old) + return 0; + + pci_write_byte(dev, 0x40, new); + + if (pci_read_byte(dev, 0x40) != new) { + printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", + 0x40, new, name); + return -1; + } + return 0; +} +//By LYH END struct flashchip * probe_flash(struct flashchip * flash) { @@ -299,7 +373,7 @@ struct flashchip * probe_flash(struct flashchip * flash) flash->total_size * 1024, (unsigned long)size); } bios = mmap (0, size, PROT_WRITE | PROT_READ, MAP_SHARED, - fd_mem, (off_t) (0 - size)); + fd_mem, (off_t) (0-size)); if (bios == MAP_FAILED) { perror("Error MMAP /dev/mem"); exit(1); @@ -393,7 +467,7 @@ typedef struct penable { } FLASH_ENABLE; FLASH_ENABLE enables[] = { - +#if 1 {0x1, 0x1, "sis630 -- what's the ID?", enable_flash_sis630}, {0x8086, 0x2480, "E7500", enable_flash_e7500}, {0x1106, 0x8231, "VT8231", enable_flash_vt8231}, @@ -401,6 +475,8 @@ FLASH_ENABLE enables[] = { {0x1078, 0x0100, "CS5530", enable_flash_cs5530}, {0x100b, 0x0510, "SC1100", enable_flash_sc1100}, {0x1039, 0x8, "SIS5595", enable_flash_sis5595}, +#endif + {0x1022, 0x7468, "AMD8111", enable_flash_amd8111}, }; int diff --git a/util/flash_and_burn/pm49fl004.c b/util/flash_and_burn/pm49fl004.c new file mode 100644 index 0000000000..7fcb3ee72c --- /dev/null +++ b/util/flash_and_burn/pm49fl004.c @@ -0,0 +1,210 @@ +/* + * pm49fl004.c: driver for Pm49FL004 flash models. + * + * + * Copyright 2004 Tyan Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * + * + */ + +#include <stdio.h> +#include "flash.h" +#include "jedec.h" +#include "pm49fl004.h" + +#define AUTO_PGRM 0x10 +#define CHIP_ERASE 0x30 +#define RESET 0xFF +#define READ_ID 0x90 + +static __inline__ void protect_49fl004 (volatile char * bios) +{ + /* ask compiler not to optimize this */ + volatile unsigned char tmp; + + tmp = *(volatile unsigned char *) (bios + 0x1823); + tmp = *(volatile unsigned char *) (bios + 0x1820); + tmp = *(volatile unsigned char *) (bios + 0x1822); + tmp = *(volatile unsigned char *) (bios + 0x0418); + tmp = *(volatile unsigned char *) (bios + 0x041B); + tmp = *(volatile unsigned char *) (bios + 0x0419); + tmp = *(volatile unsigned char *) (bios + 0x040A); +} + +static __inline__ void unprotect_49fl004 (volatile char * bios) +{ + /* ask compiler not to optimize this */ + volatile unsigned char tmp; + + tmp = *(volatile unsigned char *) (bios + 0x1823); + tmp = *(volatile unsigned char *) (bios + 0x1820); + tmp = *(volatile unsigned char *) (bios + 0x1822); + tmp = *(volatile unsigned char *) (bios + 0x0418); + tmp = *(volatile unsigned char *) (bios + 0x041B); + tmp = *(volatile unsigned char *) (bios + 0x0419); + tmp = *(volatile unsigned char *) (bios + 0x041A); +} + +static __inline__ int erase_block_49fl004 ( volatile unsigned char * bios ,unsigned long address) +{ + volatile unsigned char *Temp; + + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0xAA; /* write data 0xAA to the address */ + myusec_delay(10); + Temp = bios + 0x2AAA; /* set up address to be C000:2AAAh */ + *Temp = 0x55; /* write data 0x55 to the address */ + myusec_delay(10); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0x80; /* write data 0x80 to the address */ + myusec_delay(10); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0xAA; /* write data 0xAA to the address */ + myusec_delay(10); + Temp = bios + 0x2AAA; /* set up address to be C000:2AAAh */ + *Temp = 0x55; /* write data 0x55 to the address */ + myusec_delay(10); + Temp = bios + address; /* set up address to be C000:5555h */ + *Temp = 0x50; /* write data 0x55 to the address */ + + /* wait for Toggle bit ready */ + toggle_ready_jedec(bios); + + return(0); +} +static __inline__ int write_block_49fl004(volatile char * bios, + unsigned char * src, + volatile unsigned char * dst, + unsigned int page_size) +{ + int i; + volatile char *Temp; + + for (i = 0; i < page_size; i++) { + if (*dst != 0xff) { + printf("FATAL: dst %p not erased (val 0x%x\n", dst, *dst); + return(-1); + } + /* transfer data from source to destination */ + if (*src == 0xFF) { + dst++, src++; + /* If the data is 0xFF, don't program it */ + continue; + } + Temp = (bios + 0x5555); + *Temp = 0xAA; + Temp = bios + 0x2AAA; + *Temp = 0x55; + Temp = bios + 0x5555; + *Temp = 0xA0; + *dst = *src; + toggle_ready_jedec(bios); + if (*dst != *src) + printf("BAD! dst 0x%lx val 0x%x src 0x%x\n", + (unsigned long)dst, *dst, *src); + dst++, src++; + } + + return(0); +} + +int probe_49fl004 (struct flashchip * flash) +{ + volatile char * bios = flash->virt_addr; + unsigned char id1, id2; + + *(volatile char *) (bios + 0x5555) = 0xAA; + myusec_delay(10); + *(volatile char *) (bios + 0x2AAA) = 0x55; + myusec_delay(10); + *(volatile char *) (bios + 0x5555) = 0x90; + + myusec_delay(10); + + id1 = *(volatile unsigned char *) bios; + id2 = *(volatile unsigned char *) (bios + 0x01); + + *(volatile char *) (bios + 0x5555) = 0xAA; + *(volatile char *) (bios + 0x2AAA) = 0x55; + *(volatile char *) (bios + 0x5555) = 0xF0; + + myusec_delay(10); + + printf("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2); + + if (id1 == flash->manufacture_id && id2 == flash->model_id) + return 1; + + return 0; +} + +int erase_49fl004 (struct flashchip * flash) +{ + volatile unsigned char * bios = flash->virt_addr; + volatile unsigned char *Temp; + + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0xAA; /* write data 0xAA to the address */ + myusec_delay(10); + Temp = bios + 0x2AAA; /* set up address to be C000:2AAAh */ + *Temp = 0x55; /* write data 0x55 to the address */ + myusec_delay(10); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0x80; /* write data 0x80 to the address */ + myusec_delay(10); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0xAA; /* write data 0xAA to the address */ + myusec_delay(10); + Temp = bios + 0x2AAA; /* set up address to be C000:2AAAh */ + *Temp = 0x55; /* write data 0x55 to the address */ + myusec_delay(10); + Temp = bios + 0x5555; /* set up address to be C000:5555h */ + *Temp = 0x10; /* write data 0x10 to the address */ + + + /* wait for Toggle bit ready */ + toggle_ready_jedec(bios); + + return(0); +} + +int write_49fl004 (struct flashchip * flash, unsigned char * buf) +{ + int i; + int total_size = flash->total_size * 1024, page_size = flash->page_size; + volatile char * bios = flash->virt_addr; + +// unprotect_49fl004 (bios); +// erase_49fl004(flash); + printf ("Programming Page: "); + for (i = 0; i < total_size/page_size; i++) { + /* erase the page before programming */ + erase_block_49fl004(bios, i * page_size); + + /* write to the sector */ + printf ("%04d at address: 0x%08x", i, i * page_size); + write_block_49fl004(bios, buf + i * page_size, bios + i * page_size, + page_size); + printf ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); + fflush(stdout); + } + printf("\n"); + +// protect_49fl004 (bios); + + return(0); +} diff --git a/util/flash_and_burn/pm49fl004.h b/util/flash_and_burn/pm49fl004.h new file mode 100644 index 0000000000..4a75da1751 --- /dev/null +++ b/util/flash_and_burn/pm49fl004.h @@ -0,0 +1,8 @@ +#ifndef __PM49FL004_H__ +#define __PM49FL004_H__ 1 + +extern int probe_49fl004 (struct flashchip * flash); +extern int erase_49fl004 (struct flashchip * flash); +extern int write_49fl004 (struct flashchip * flash, unsigned char * buf); + +#endif |