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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-02-16 09:52:09 +0100 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2020-02-17 14:01:22 +0000 |
| commit | c9a717ddb01dd7f8ba0a7fb3eb622885cd3716ad (patch) | |
| tree | f31c50b52c18574475e9a7c9e603870e78a97c17 | |
| parent | bd75e0c5cbe9f80519e7cf05e9077f3920414a55 (diff) | |
| download | coreboot-c9a717ddb01dd7f8ba0a7fb3eb622885cd3716ad.tar.xz | |
nb/intel/gm45: Fix typo in console message
Change-Id: Ia0d7d5ecf376af97ee54ff3ca536160202e43f79
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
| -rw-r--r-- | src/northbridge/intel/gm45/raminit.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c index 5b8d1d811e..90dfa92a60 100644 --- a/src/northbridge/intel/gm45/raminit.c +++ b/src/northbridge/intel/gm45/raminit.c @@ -1293,7 +1293,7 @@ static void program_memory_map(const dimminfo_t *const dimms, const channel_mode MCHBAR32(DCC_MCHBAR) &= ~DCC_INTERLEAVED; break; case CHANNEL_MODE_DUAL_ASYNC: - printk(BIOS_DEBUG, "Memory configured in dual-channel assymetric mode.\n"); + printk(BIOS_DEBUG, "Memory configured in dual-channel asymmetric mode.\n"); MCHBAR32(DCC_MCHBAR) &= ~DCC_INTERLEAVED; break; case CHANNEL_MODE_DUAL_INTERLEAVED: |