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authorElyes HAOUAS <ehaouas@noos.fr>2019-06-21 07:31:40 +0200
committerFelix Held <felix-coreboot@felixheld.de>2019-06-21 16:04:16 +0000
commitd26844ce823791acbc95fb3e109d948b9c36995c (patch)
treef87a19d0d922a2218a8821923aa32d6823059b2c
parente2d152c118af73500d5c6162c0c1407712458742 (diff)
downloadcoreboot-d26844ce823791acbc95fb3e109d948b9c36995c.tar.xz
cpu: Add missing #include <commonlib/helpers.h>
ALIGN and ALIGN_UP needs 'helpers.h' Change-Id: Ib3a9e0d6caff69f4b0adb54364b47cc6ac52a610 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33658 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
-rw-r--r--src/cpu/amd/car/post_cache_as_ram.c2
-rw-r--r--src/cpu/intel/car/romstage.c1
-rw-r--r--src/cpu/intel/haswell/romstage.c1
-rw-r--r--src/cpu/intel/smm/gen1/smmrelocate.c1
-rw-r--r--src/cpu/x86/mirror_payload.c1
-rw-r--r--src/cpu/x86/mtrr/mtrr.c1
-rw-r--r--src/cpu/x86/smm/smm_module_loader.c1
7 files changed, 8 insertions, 0 deletions
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index f49c6765c6..50ed657f42 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -16,10 +16,12 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
+
#include <string.h>
#include <console/console.h>
#include <arch/stages.h>
#include <arch/early_variables.h>
+#include <commonlib/helpers.h>
#include <cpu/x86/mtrr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/car.h>
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index a7daff4fb2..89052d6be6 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -16,6 +16,7 @@
#include <cpu/intel/romstage.h>
#include <cpu/x86/mtrr.h>
#include <arch/symbols.h>
+#include <commonlib/helpers.h>
#include <program_loading.h>
#include <timestamp.h>
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 0426bb4cea..3cbdf44c1d 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -24,6 +24,7 @@
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <cbmem.h>
+#include <commonlib/helpers.h>
#include <program_loading.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c
index f3192bcd55..d52043f047 100644
--- a/src/cpu/intel/smm/gen1/smmrelocate.c
+++ b/src/cpu/intel/smm/gen1/smmrelocate.c
@@ -21,6 +21,7 @@
#include <string.h>
#include <device/device.h>
#include <device/pci.h>
+#include <commonlib/helpers.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/mp.h>
#include <cpu/x86/msr.h>
diff --git a/src/cpu/x86/mirror_payload.c b/src/cpu/x86/mirror_payload.c
index 6da21646fc..88c5e8183f 100644
--- a/src/cpu/x86/mirror_payload.c
+++ b/src/cpu/x86/mirror_payload.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
+#include <commonlib/helpers.h>
#include <console/console.h>
#include <bootmem.h>
#include <program_loading.h>
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 60eee319ce..e9efc8b1de 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -25,6 +25,7 @@
#include <stdlib.h>
#include <string.h>
#include <bootstate.h>
+#include <commonlib/helpers.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci_ids.h>
diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c
index 80b2c27c79..b3ffb3d318 100644
--- a/src/cpu/x86/smm/smm_module_loader.c
+++ b/src/cpu/x86/smm/smm_module_loader.c
@@ -17,6 +17,7 @@
#include <rmodule.h>
#include <cpu/x86/smm.h>
#include <cpu/x86/cache.h>
+#include <commonlib/helpers.h>
#include <console/console.h>
#define FXSAVE_SIZE 512