diff options
author | Martin Roth <martin@coreboot.org> | 2019-07-13 20:13:07 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2019-07-15 17:47:04 +0000 |
commit | d3ce8c844221bfbcfd64d14e3ed815a5a39fcd72 (patch) | |
tree | d8c413b9538119380e7c8c30919c0bddb345789b | |
parent | ec933135ceb8cadb64e902b542a00bbc62557a77 (diff) | |
download | coreboot-d3ce8c844221bfbcfd64d14e3ed815a5a39fcd72.tar.xz |
util/amdfwtool: Add option to build verstage binary into the PSP
For AMD's Family17h processors, verstage needs to be run in the PSP,
before memory is initialized. This adds that binary into the PSP
directory.
See the Family17h documentation in the coreboot documentation directory
for more information.
BUG=b:137338769
TEST=Build, add test binary to mandolin board, boot
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I29002a1af51c59a2e6c715e15f3dc63e59cd5729
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34324
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
-rw-r--r-- | util/amdfwtool/amdfwtool.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index b1d3d2ec79..1ecb7aaaab 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -203,6 +203,7 @@ static void usage(void) printf("-K | --drv-entry-pts <FILE> Add PSP driver entry points\n"); printf("-L | --ikek <FILE> Add Wrapped iKEK\n"); printf("-Y | --s0i3drv <FILE> Add s0i3 driver\n"); + printf("-Z | --verstage <FILE> Add verstage\n"); printf("\nBIOS options:\n"); printf("-I | --instance <number> Sets instance field for the next BIOS firmware\n"); printf("-a | --apcb <FILE> Add AGESA PSP customization block\n"); @@ -290,6 +291,7 @@ typedef enum _amd_fw_type { AMD_ABL7 = 0x37, AMD_FW_PSP_WHITELIST = 0x3a, AMD_FW_L2_PTR = 0x40, + AMD_FW_PSP_VERSTAGE = 0x52, AMD_FW_IMC, AMD_FW_GEC, AMD_FW_XHCI, @@ -345,6 +347,7 @@ static amd_fw_entry amd_psp_fw_table[] = { { .type = AMD_FW_PSP_SMU_FIRMWARE, .subprog = 1, .level = PSP_BOTH }, { .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 1, .level = PSP_BOTH }, { .type = AMD_FW_PSP_WHITELIST, .level = PSP_LVL2 }, + { .type = AMD_FW_PSP_VERSTAGE, .level = PSP_BOTH }, { .type = AMD_FW_INVALID }, }; @@ -975,8 +978,8 @@ static void integrate_bios_firmwares(context *ctx, fill_dir_header(biosdir, count, cookie); } - -static const char *optstring = "x:i:g:AMS:p:b:s:r:k:c:n:d:t:u:w:m:T:z:J:B:K:L:Y:N:UW:I:a:Q:V:e:v:j:y:G:O:X:F:H:o:f:l:h"; +// Unused values: CDEPqR +static const char *optstring = "x:i:g:AMS:p:b:s:r:k:c:n:d:t:u:w:m:T:z:J:B:K:L:Y:N:UW:I:a:Q:V:e:v:j:y:G:O:X:F:H:o:f:l:hZ:"; static struct option long_options[] = { {"xhci", required_argument, 0, 'x' }, @@ -1008,6 +1011,7 @@ static struct option long_options[] = { {"secdebug", required_argument, 0, 'N' }, {"token-unlock", no_argument, 0, 'U' }, {"whitelist", required_argument, 0, 'W' }, + {"verstage", required_argument, 0, 'Z' }, /* BIOS Directory Table items */ {"instance", required_argument, 0, 'I' }, {"apcb", required_argument, 0, 'a' }, @@ -1322,6 +1326,10 @@ int main(int argc, char **argv) register_fw_filename(AMD_FW_PSP_WHITELIST, sub, optarg); sub = instance = 0; break; + case 'Z': + register_fw_filename(AMD_FW_PSP_VERSTAGE, sub, optarg); + sub = instance = 0; + break; case 'o': output = optarg; break; |