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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-06 17:40:36 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-08 02:51:47 +0000 |
| commit | db866ba2009f6376dc8fd32e506a614439ba618c (patch) | |
| tree | 1df01e74811668c31e8c2cf51844211b9043dcfe | |
| parent | a6ce5d3faa5de44a8d2ac183c4478f8da14ddbaf (diff) | |
| download | coreboot-db866ba2009f6376dc8fd32e506a614439ba618c.tar.xz | |
amdfam10 boards: Fix regression on dev_find_slot() removal
For these platforms, the first PCI node on devicetree
is not the root of PCI bus hierarchy, and the topology
(bus->children and dev->sibling links) are getting
manipulated during HyperTransport enumeration.
This workaround reverts back to old dev_find_slot() with
its bad semantics.
Change-Id: I19745c3070c12e562ffab2f0243c9d91dd051c72
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30695
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
| -rw-r--r-- | src/device/device_const.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/device/device_const.c b/src/device/device_const.c index ec128e877d..f60f749c49 100644 --- a/src/device/device_const.c +++ b/src/device/device_const.c @@ -187,9 +187,17 @@ DEVTREE_CONST struct device *pcidev_path_on_root(pci_devfn_t devfn) { DEVTREE_CONST struct device *pci_domain; + /* Work around pcidev_path_behind() below failing + * due tue complicated devicetree with topology + * being manipulated on-the-fly. + */ + if (IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDFAM10)) + return dev_find_slot(0, devfn); + pci_domain = dev_find_path(NULL, DEVICE_PATH_DOMAIN); if (!pci_domain) return NULL; + return pcidev_path_behind(pci_domain->link_list, devfn); } |