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authorPhilipp Hug <philipp@hug.cx>2018-07-11 13:31:34 +0200
committerRonald G. Minnich <rminnich@gmail.com>2018-09-14 10:41:49 +0000
commitdf5e6f64b6dd465cb6253159dc3c7335e763dbde (patch)
tree5ddc4dbb2a243ac3d403d13f5af60ba8df866e36
parent91595724e7f302e0a876f0507e307f37f5871a7d (diff)
downloadcoreboot-df5e6f64b6dd465cb6253159dc3c7335e763dbde.tar.xz
soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation
After changing clock from 33.33Mhz to 1Ghz the UART divisor needs to be recalculated. Return correct tlck frequency in uart_platform_refclk. Change-Id: I2291e4198cf466a8334211c6c46bc3268fc979a9 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/28584 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
-rw-r--r--src/soc/sifive/fu540/uart.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/soc/sifive/fu540/uart.c b/src/soc/sifive/fu540/uart.c
index c53f42d9d8..b563be13b1 100644
--- a/src/soc/sifive/fu540/uart.c
+++ b/src/soc/sifive/fu540/uart.c
@@ -13,8 +13,11 @@
* GNU General Public License for more details.
*/
+#include <stddef.h>
+#include <stdint.h>
#include <console/uart.h>
#include <soc/addressmap.h>
+#include <soc/clock.h>
uintptr_t uart_platform_base(int idx)
{
@@ -29,5 +32,9 @@ unsigned int uart_platform_refclk(void)
/*
* The SiFive UART uses tlclk, which is coreclk/2 as input
*/
- return 33330000 / 2;
+
+ if (ENV_BOOTBLOCK)
+ return 33330000 / 2;
+ else
+ return clock_get_coreclk_khz() * KHz / 2;
}