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| author | Rudolf Marek <r.marek@assembler.cz> | 2009-02-01 18:40:50 +0000 |
|---|---|---|
| committer | Rudolf Marek <r.marek@assembler.cz> | 2009-02-01 18:40:50 +0000 |
| commit | e66c258f1baf668fee417b08494480ddedc00749 (patch) | |
| tree | 07e23172066e91eeffa0609d1da4dd880c70c07a | |
| parent | 293b5f52253ec0e5edb38e9f7113afc7e8f8ba6e (diff) | |
| download | coreboot-e66c258f1baf668fee417b08494480ddedc00749.tar.xz | |
Following patch fixes VIA SPI (VT8237S). It needs to have opcodes
initialized same way as ICH7.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | util/flashrom/chipset_enable.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/util/flashrom/chipset_enable.c b/util/flashrom/chipset_enable.c index dc5cccb33f..3eb8b2878c 100644 --- a/util/flashrom/chipset_enable.c +++ b/util/flashrom/chipset_enable.c @@ -221,6 +221,7 @@ static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) *(uint16_t *) (spibar + 0x6c)); flashbus = BUS_TYPE_VIA_SPI; + ich_init_opcodes(); return 0; } |