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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-10-10 20:54:41 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-10-10 20:54:41 +0000 |
| commit | f4b54b413502ddd548a39439cba80dcf9b821bd6 (patch) | |
| tree | 1d384efe7a8dc381c0fc6dc8a3df890ce39a8b1d | |
| parent | 4e40e46d49fef1a9ec15a40c10deb88f11c2cada (diff) | |
| download | coreboot-f4b54b413502ddd548a39439cba80dcf9b821bd6.tar.xz | |
Add ICH10 support to flashrom.
The ICH9 and ICH10 data sheets are identical regarding FWH/SPI flash
interfaces, so this just adds the required PCI IDs.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3648 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | util/flashrom/chipset_enable.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/util/flashrom/chipset_enable.c b/util/flashrom/chipset_enable.c index 241a69831b..c6aa876b99 100644 --- a/util/flashrom/chipset_enable.c +++ b/util/flashrom/chipset_enable.c @@ -274,6 +274,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, int ic spibar_offset = 0x3020; break; case 9: + case 10: default: /* Future version might behave the same */ flashbus = BUS_TYPE_ICH9_SPI; spibar_offset = 0x3800; @@ -357,6 +358,11 @@ static int enable_flash_ich9(struct pci_dev *dev, const char *name) return enable_flash_ich_dc_spi(dev, name, 9); } +static int enable_flash_ich10(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_dc_spi(dev, name, 10); +} + static int enable_flash_vt823x(struct pci_dev *dev, const char *name) { uint8_t val; @@ -723,6 +729,10 @@ static const FLASH_ENABLE enables[] = { {0x8086, 0x2917, "Intel ICH9M-E", enable_flash_ich9}, {0x8086, 0x2918, "Intel ICH9", enable_flash_ich9}, {0x8086, 0x2919, "Intel ICH9M", enable_flash_ich9}, + {0x8086, 0x3a14, "Intel ICH10DO", enable_flash_ich10}, + {0x8086, 0x3a16, "Intel ICH10R", enable_flash_ich10}, + {0x8086, 0x3a18, "Intel ICH10", enable_flash_ich10}, + {0x8086, 0x3a1a, "Intel ICH10D", enable_flash_ich10}, {0x1106, 0x8231, "VIA VT8231", enable_flash_vt823x}, {0x1106, 0x3177, "VIA VT8235", enable_flash_vt823x}, {0x1106, 0x3227, "VIA VT8237", enable_flash_vt823x}, |