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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-05-16 21:11:53 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-05-16 21:11:53 +0000 |
| commit | fb047a6a54ffd872a4059d04a3f2a8b59ae9ab29 (patch) | |
| tree | b8e468285dcf8a4fbdc494632b7508503ee51a47 | |
| parent | 85e46e6bd68b18ebd2734f30dc8516f44310630b (diff) | |
| download | coreboot-fb047a6a54ffd872a4059d04a3f2a8b59ae9ab29.tar.xz | |
I looked at the datasheet and erase_sector_39sf020() is totally and
completely wrong. It was a straight cut'n'paste from SST 28SF040 code
and the person doing the cut'n'paste didn't even bother to check the
data sheet. The SST 39SF020 is completely incompatible with the 28SF040.
No need for replacement. According to the data sheet, standard JEDEC
commands will work and we have those commands in the tree already.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3331 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | util/flashrom/sst39sf020.c | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/util/flashrom/sst39sf020.c b/util/flashrom/sst39sf020.c index c4fd9570c1..f6fcc37315 100644 --- a/util/flashrom/sst39sf020.c +++ b/util/flashrom/sst39sf020.c @@ -22,21 +22,6 @@ #include <stdint.h> #include "flash.h" -#define AUTO_PG_ERASE1 0x20 -#define AUTO_PG_ERASE2 0xD0 - -static __inline__ int erase_sector_39sf020(volatile uint8_t *bios, - unsigned long address) -{ - *bios = AUTO_PG_ERASE1; - *(bios + address) = AUTO_PG_ERASE2; - - /* wait for Toggle bit ready */ - toggle_ready_jedec(bios); - - return 0; -} - int write_39sf020(struct flashchip *flash, uint8_t *buf) { int i; |