ARM: Fix the way the space for the page tables is allocated.

The page tables need to be aligned to a 16KB boundary and are 16KB in size.
The CBMEM allocator only guarantees 512 byte alignment, so to make sure
things are where they're supposed to be, the code was allocating extra space
and then adjusting the pointer upwards. Unfortunately, it was adding the size
of the table to the pointer first, then aligning it. Since it allocated twice
the space of the table, this had the effect of moving past the first table
size region of bytes, and then aligning upwards, pushing the end of the table
out of the space allocated for it.

You can get away with this if you push things you don't care about off the
end, and it happened to be the case that we were allocating a color map we
weren't using at the start of the next part of cbmem.

Change-Id: I6b196fc573801b02f27f2e667acbf06163266651
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3651
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 5 insertions, 4 deletions

diff --git a/src/arch/armv7/lib/mmu.c b/src/arch/armv7/lib/mmu.c
index d4e08f7050..594bba5f29 100644
--- a/src/arch/armv7/lib/mmu.c
+++ b/src/arch/armv7/lib/mmu.c
@@ -118,11 +118,12 @@ void mmu_init(void)
 	 * programmer's guide)
 	 *
 	 * FIXME: TLB needs to be aligned to 16KB, but cbmem_add() aligns to
-	 * 512 bytes. So add double the space in cbmem and fix-up the pointer.
+	 * 512 bytes. So allocate some extra space in cbmem and fix-up the
+	 * pointer.
 	 */
-	ttb_size = L1_TLB_ENTRIES * sizeof(unsigned long);
-	ttb_addr = (uintptr_t)cbmem_add(CBMEM_ID_GDT, ttb_size * 2);
-	ttb_addr = ALIGN(ttb_addr + ttb_size, ttb_size);
+	ttb_size = L1_TLB_ENTRIES * sizeof(uint32_t);
+	ttb_addr = (uintptr_t)cbmem_add(CBMEM_ID_GDT, ttb_size + 16*KiB);
+	ttb_addr = ALIGN(ttb_addr, 16*KiB);
 	printk(BIOS_DEBUG, "Translation table is @ 0x%08x\n", ttb_addr);
 
 	/*