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authorAaron Durbin <adurbin@chromium.org>2015-10-08 12:59:38 -0500
committerAaron Durbin <adurbin@gmail.com>2015-10-11 23:56:32 +0000
commitfb9e378f2d239df8f3bd582f4f9d862f31748cbb (patch)
treeadee79f8bc95efb654015e66965fc45fd77aef3f
parent079fb3fc293fb0ef6669f45951b4b1ae4a8d449a (diff)
downloadcoreboot-fb9e378f2d239df8f3bd582f4f9d862f31748cbb.tar.xz
tegra132: increase romstage size for vboot
Bump up the romstage size to allow more breathing room. Change-Id: I4df7031d286c13797dccdf2f49d023bbf462fbb8 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11830 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r--src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
index a8164a91a4..552b443496 100644
--- a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
+++ b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
@@ -37,8 +37,8 @@ SECTIONS
STACK(0x40018000, 2K)
TIMESTAMP(0x40018800, 2K)
BOOTBLOCK(0x40019000, 22K)
- VERSTAGE(0x4001e800, 58K)
- ROMSTAGE(0x4002d000, 76K)
+ VERSTAGE(0x4001e800, 55K)
+ ROMSTAGE(0x4002c400, 77K)
SRAM_END(0x40040000)
DRAM_START(0x80000000)