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authorUwe Poeche <uwe.poeche@siemens.com>2019-02-06 12:52:56 +0100
committerWerner Zeh <werner.zeh@siemens.com>2019-02-13 08:34:49 +0000
commitfdd051976133301fc2df6c2242d690c732f71b85 (patch)
tree1f2cdd06d8455113f8110ae60bed10f4f3e41d62
parent51579edc60501db2c8294ccf4682f6d17e762d5d (diff)
downloadcoreboot-fdd051976133301fc2df6c2242d690c732f71b85.tar.xz
siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4
This patch enables TPM2 on LPC and adds the needed devicetree entry for TPM for mc_apl4. Test=mc_apl4 flashed, booted into Linux and checked via dmesg if TPM is present Change-Id: I9af7e1a8623302eca46f5ecd8e498678ccda92ad Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com> Reviewed-on: https://review.coreboot.org/c/31344 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig3
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb6
2 files changed, 8 insertions, 1 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig
index 247b052129..060d695c02 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig
@@ -6,6 +6,9 @@ config BOARD_SPECIFIC_OPTIONS
select DRIVER_INTEL_I210
select APL_SET_MIN_CLOCK_RATIO
select DRIVERS_I2C_RX6110SA
+ select MAINBOARD_HAS_TPM2
+ select MAINBOARD_HAS_LPC_TPM
+ select TPM_ON_FAST_SPI
config UART_FOR_CONSOLE
default 1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
index 4928701c03..e6feb4813e 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
@@ -102,7 +102,11 @@ chip soc/intel/apollolake
device pci 1c.0 on end # - eMMC
device pci 1d.0 off end # - UFS
device pci 1e.0 off end # - SDIO
- device pci 1f.0 on end # - LPC
+ device pci 1f.0 on # - LPC
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
+ end
device pci 1f.1 on end # - SMBUS
end
end