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authorAaron Durbin <adurbin@chromium.org>2016-04-29 23:15:12 -0500
committerAaron Durbin <adurbin@chromium.org>2016-05-02 20:07:25 +0200
commit0e556326619ece4c7847ddc6ffccb19b02e22da4 (patch)
tree0c3f0a5fb491ddd5f39c37c9d0924b8b09909d44
parentddf4fa0cc35e6fc65d347b8c9eb4acbe0cba51b9 (diff)
downloadcoreboot-0e556326619ece4c7847ddc6ffccb19b02e22da4.tar.xz
cpu/x86/mp_init: remove unused callback arguments
The BSP and AP callback declarations both had an optional argument that could be passed. In practice that functionality was never used so drop it. Change-Id: I47fa814a593b6c2ee164c88d255178d3fb71e8ce Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14556 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/cpu/intel/haswell/haswell_init.c12
-rw-r--r--src/cpu/x86/mp_init.c6
-rw-r--r--src/include/cpu/x86/mp.h18
-rw-r--r--src/soc/intel/apollolake/cpu.c2
-rw-r--r--src/soc/intel/baytrail/cpu.c14
-rw-r--r--src/soc/intel/braswell/cpu.c20
-rw-r--r--src/soc/intel/broadwell/cpu.c12
-rw-r--r--src/soc/intel/fsp_baytrail/cpu.c16
-rw-r--r--src/soc/intel/fsp_broadwell_de/cpu.c2
-rw-r--r--src/soc/intel/skylake/cpu.c12
10 files changed, 55 insertions, 59 deletions
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index b4bff83300..f488ef61a8 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -772,7 +772,7 @@ static int adjust_apic_id_ht_disabled(int index, int apic_id)
return 2 * index;
}
-static void relocate_and_load_microcode(void *unused)
+static void relocate_and_load_microcode(void)
{
/* Relocate the SMM handler. */
smm_relocate();
@@ -781,7 +781,7 @@ static void relocate_and_load_microcode(void *unused)
intel_microcode_load_unlocked(microcode_patch);
}
-static void enable_smis(void *unused)
+static void enable_smis(void)
{
/* Now that all APs have been relocated as well as the BSP let SMIs
* start flowing. */
@@ -792,11 +792,11 @@ static void enable_smis(void *unused)
}
static struct mp_flight_record mp_steps[] = {
- MP_FR_NOBLOCK_APS(relocate_and_load_microcode, NULL,
- relocate_and_load_microcode, NULL),
- MP_FR_BLOCK_APS(mp_initialize_cpu, NULL, mp_initialize_cpu, NULL),
+ MP_FR_NOBLOCK_APS(relocate_and_load_microcode,
+ relocate_and_load_microcode),
+ MP_FR_BLOCK_APS(mp_initialize_cpu, mp_initialize_cpu),
/* Wait for APs to finish initialization before proceeding. */
- MP_FR_BLOCK_APS(NULL, NULL, enable_smis, NULL),
+ MP_FR_BLOCK_APS(NULL, enable_smis),
};
void bsp_init_and_start_aps(struct bus *cpu_bus)
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index 184dc4fcc1..2180d98e89 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -129,7 +129,7 @@ static void ap_do_flight_plan(void)
barrier_wait(&rec->barrier);
if (rec->ap_call != NULL) {
- rec->ap_call(rec->ap_arg);
+ rec->ap_call();
}
}
}
@@ -477,7 +477,7 @@ static int bsp_do_flight_plan(struct mp_params *mp_params)
}
if (rec->bsp_call != NULL) {
- rec->bsp_call(rec->bsp_arg);
+ rec->bsp_call();
}
release_barrier(&rec->barrier);
@@ -563,7 +563,7 @@ int mp_init(struct bus *cpu_bus, struct mp_params *p)
return bsp_do_flight_plan(p);
}
-void mp_initialize_cpu(void *unused)
+void mp_initialize_cpu(void)
{
/* Call back into driver infrastructure for the AP initialization. */
struct cpu_info *info = cpu_info();
diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h
index 1feab68ebd..3227975254 100644
--- a/src/include/cpu/x86/mp.h
+++ b/src/include/cpu/x86/mp.h
@@ -28,7 +28,7 @@ static inline void mfence(void)
__asm__ __volatile__("mfence\t\n": : :"memory");
}
-typedef void (*mp_callback_t)(void *arg);
+typedef void (*mp_callback_t)(void);
/*
* A mp_flight_record details a sequence of calls for the APs to perform
@@ -47,26 +47,22 @@ struct mp_flight_record {
atomic_t barrier;
atomic_t cpus_entered;
mp_callback_t ap_call;
- void *ap_arg;
mp_callback_t bsp_call;
- void *bsp_arg;
} __attribute__((aligned(CACHELINE_SIZE)));
-#define _MP_FLIGHT_RECORD(barrier_, ap_func_, ap_arg_, bsp_func_, bsp_arg_) \
+#define _MP_FLIGHT_RECORD(barrier_, ap_func_, bsp_func_) \
{ \
.barrier = ATOMIC_INIT(barrier_), \
.cpus_entered = ATOMIC_INIT(0), \
.ap_call = ap_func_, \
- .ap_arg = ap_arg_, \
.bsp_call = bsp_func_, \
- .bsp_arg = bsp_arg_, \
}
-#define MP_FR_BLOCK_APS(ap_func_, ap_arg_, bsp_func_, bsp_arg_) \
- _MP_FLIGHT_RECORD(0, ap_func_, ap_arg_, bsp_func_, bsp_arg_)
+#define MP_FR_BLOCK_APS(ap_func_, bsp_func_) \
+ _MP_FLIGHT_RECORD(0, ap_func_, bsp_func_)
-#define MP_FR_NOBLOCK_APS(ap_func_, ap_arg_, bsp_func_, bsp_arg_) \
- _MP_FLIGHT_RECORD(1, ap_func_, ap_arg_, bsp_func_, bsp_arg_)
+#define MP_FR_NOBLOCK_APS(ap_func_, bsp_func_) \
+ _MP_FLIGHT_RECORD(1, ap_func_, bsp_func_)
/* The mp_params structure provides the arguments to the mp subsystem
* for bringing up APs. */
@@ -108,7 +104,7 @@ int mp_init(struct bus *cpu_bus, struct mp_params *params);
*/
/* Calls cpu_initialize(info->index) which calls the coreboot CPU drivers. */
-void mp_initialize_cpu(void *unused);
+void mp_initialize_cpu(void);
/* Returns apic id for coreboot cpu number or < 0 on failure. */
int mp_get_apic_id(int cpu_slot);
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index 03fae0eddf..21cd33af39 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -71,7 +71,7 @@ static void bsp_pre_mp_setup(void)
*/
static struct mp_flight_record flight_plan[] = {
/* NOTE: MTRR solution must be calculated before firing up the APs */
- MP_FR_NOBLOCK_APS(mp_initialize_cpu, NULL, mp_initialize_cpu, NULL),
+ MP_FR_NOBLOCK_APS(mp_initialize_cpu, mp_initialize_cpu),
};
void apollolake_init_cpus(device_t dev)
diff --git a/src/soc/intel/baytrail/cpu.c b/src/soc/intel/baytrail/cpu.c
index 6188689c6c..fd9c7fbedc 100644
--- a/src/soc/intel/baytrail/cpu.c
+++ b/src/soc/intel/baytrail/cpu.c
@@ -32,14 +32,14 @@
#include <soc/ramstage.h>
#include <soc/smm.h>
-static void smm_relocate(void *unused);
-static void enable_smis(void *unused);
+static void smm_relocate(void);
+static void enable_smis(void);
static struct mp_flight_record mp_steps[] = {
- MP_FR_BLOCK_APS(smm_relocate, NULL, smm_relocate, NULL),
- MP_FR_BLOCK_APS(mp_initialize_cpu, NULL, mp_initialize_cpu, NULL),
+ MP_FR_BLOCK_APS(smm_relocate, smm_relocate),
+ MP_FR_BLOCK_APS(mp_initialize_cpu, mp_initialize_cpu),
/* Wait for APs to finish initialization before proceeding. */
- MP_FR_BLOCK_APS(NULL, NULL, enable_smis, NULL),
+ MP_FR_BLOCK_APS(NULL, enable_smis),
};
/* The APIC id space on Bay Trail is sparse. Each id is separated by 2. */
@@ -278,7 +278,7 @@ static int smm_load_handlers(void)
return 0;
}
-static void smm_relocate(void *unused)
+static void smm_relocate(void)
{
const struct pattrs *pattrs = pattrs_get();
@@ -298,7 +298,7 @@ static void smm_relocate(void *unused)
intel_microcode_load_unlocked(pattrs->microcode_patch);
}
-static void enable_smis(void *unused)
+static void enable_smis(void)
{
southcluster_smm_enable_smi();
}
diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c
index 71af487840..3d682b70aa 100644
--- a/src/soc/intel/braswell/cpu.c
+++ b/src/soc/intel/braswell/cpu.c
@@ -33,16 +33,16 @@
#include <soc/smm.h>
#include <stdlib.h>
-static void smm_relocate(void *unused);
-static void enable_smis(void *unused);
-static void pre_smm_relocation(void *unused);
+static void smm_relocate(void);
+static void enable_smis(void);
+static void pre_smm_relocation(void);
static struct mp_flight_record mp_steps[] = {
- MP_FR_BLOCK_APS(pre_smm_relocation, NULL, pre_smm_relocation, NULL),
- MP_FR_BLOCK_APS(smm_relocate, NULL, smm_relocate, NULL),
- MP_FR_BLOCK_APS(mp_initialize_cpu, NULL, mp_initialize_cpu, NULL),
+ MP_FR_BLOCK_APS(pre_smm_relocation, pre_smm_relocation),
+ MP_FR_BLOCK_APS(smm_relocate, smm_relocate),
+ MP_FR_BLOCK_APS(mp_initialize_cpu, mp_initialize_cpu),
/* Wait for APs to finish initialization before proceeding. */
- MP_FR_BLOCK_APS(NULL, NULL, enable_smis, NULL),
+ MP_FR_BLOCK_APS(NULL, enable_smis),
};
/* The APIC id space is sparse. Each id is separated by 2. */
@@ -299,7 +299,7 @@ static int smm_load_handlers(void)
return 0;
}
-static void pre_smm_relocation(void *unused)
+static void pre_smm_relocation(void)
{
const struct pattrs *pattrs = pattrs_get();
msr_t msr_value;
@@ -310,7 +310,7 @@ static void pre_smm_relocation(void *unused)
intel_microcode_load_unlocked(pattrs->microcode_patch);
}
-static void smm_relocate(void *unused)
+static void smm_relocate(void)
{
const struct pattrs *pattrs = pattrs_get();
@@ -330,7 +330,7 @@ static void smm_relocate(void *unused)
intel_microcode_load_unlocked(pattrs->microcode_patch);
}
-static void enable_smis(void *unused)
+static void enable_smis(void)
{
southcluster_smm_enable_smi();
}
diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c
index 5f3fb152cf..15c003e732 100644
--- a/src/soc/intel/broadwell/cpu.c
+++ b/src/soc/intel/broadwell/cpu.c
@@ -619,7 +619,7 @@ static int adjust_apic_id_ht_disabled(int index, int apic_id)
return 2 * index;
}
-static void relocate_and_load_microcode(void *unused)
+static void relocate_and_load_microcode(void)
{
/* Relocate the SMM handler. */
smm_relocate();
@@ -628,7 +628,7 @@ static void relocate_and_load_microcode(void *unused)
intel_microcode_load_unlocked(microcode_patch);
}
-static void enable_smis(void *unused)
+static void enable_smis(void)
{
/* Now that all APs have been relocated as well as the BSP let SMIs
* start flowing. */
@@ -639,11 +639,11 @@ static void enable_smis(void *unused)
}
static struct mp_flight_record mp_steps[] = {
- MP_FR_NOBLOCK_APS(relocate_and_load_microcode, NULL,
- relocate_and_load_microcode, NULL),
- MP_FR_BLOCK_APS(mp_initialize_cpu, NULL, mp_initialize_cpu, NULL),
+ MP_FR_NOBLOCK_APS(relocate_and_load_microcode,
+ relocate_and_load_microcode),
+ MP_FR_BLOCK_APS(mp_initialize_cpu, mp_initialize_cpu),
/* Wait for APs to finish initialization before proceeding. */
- MP_FR_BLOCK_APS(NULL, NULL, enable_smis, NULL),
+ MP_FR_BLOCK_APS(NULL, enable_smis),
};
static struct device_operations cpu_dev_ops = {
diff --git a/src/soc/intel/fsp_baytrail/cpu.c b/src/soc/intel/fsp_baytrail/cpu.c
index 1fed5543c3..3856a06872 100644
--- a/src/soc/intel/fsp_baytrail/cpu.c
+++ b/src/soc/intel/fsp_baytrail/cpu.c
@@ -33,18 +33,18 @@
#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
#include <soc/smm.h>
-static void smm_relocate(void *unused);
-static void enable_smis(void *unused);
+static void smm_relocate(void);
+static void enable_smis(void);
static struct mp_flight_record mp_steps[] = {
- MP_FR_BLOCK_APS(smm_relocate, NULL, smm_relocate, NULL),
- MP_FR_BLOCK_APS(mp_initialize_cpu, NULL, mp_initialize_cpu, NULL),
+ MP_FR_BLOCK_APS(smm_relocate, smm_relocate),
+ MP_FR_BLOCK_APS(mp_initialize_cpu, mp_initialize_cpu),
/* Wait for APs to finish initialization before proceeding. */
- MP_FR_BLOCK_APS(NULL, NULL, enable_smis, NULL),
+ MP_FR_BLOCK_APS(NULL, enable_smis),
};
#else /* CONFIG_HAVE_SMI_HANDLER */
static struct mp_flight_record mp_steps[] = {
- MP_FR_BLOCK_APS(mp_initialize_cpu, NULL, mp_initialize_cpu, NULL),
+ MP_FR_BLOCK_APS(mp_initialize_cpu, mp_initialize_cpu),
};
#endif
@@ -252,7 +252,7 @@ static int smm_load_handlers(void)
return 0;
}
-static void smm_relocate(void *unused)
+static void smm_relocate(void)
{
/* Load relocation and permanent handler. */
@@ -268,7 +268,7 @@ static void smm_relocate(void *unused)
smm_initiate_relocation();
}
-static void enable_smis(void *unused)
+static void enable_smis(void)
{
southcluster_smm_enable_smi();
}
diff --git a/src/soc/intel/fsp_broadwell_de/cpu.c b/src/soc/intel/fsp_broadwell_de/cpu.c
index 173e978492..2f6487a983 100644
--- a/src/soc/intel/fsp_broadwell_de/cpu.c
+++ b/src/soc/intel/fsp_broadwell_de/cpu.c
@@ -30,7 +30,7 @@
static void configure_mca(void);
static struct mp_flight_record mp_steps[] = {
- MP_FR_BLOCK_APS(mp_initialize_cpu, NULL, mp_initialize_cpu, NULL),
+ MP_FR_BLOCK_APS(mp_initialize_cpu, mp_initialize_cpu),
};
static int adjust_apic_id(int index, int apic_id)
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 38c5b52d5c..17fa0aeb93 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -391,7 +391,7 @@ static int adjust_apic_id_ht_disabled(int index, int apic_id)
return 2 * index;
}
-static void relocate_and_load_microcode(void *unused)
+static void relocate_and_load_microcode(void)
{
/* Relocate the SMM handler. */
smm_relocate();
@@ -400,7 +400,7 @@ static void relocate_and_load_microcode(void *unused)
intel_microcode_load_unlocked(microcode_patch);
}
-static void enable_smis(void *unused)
+static void enable_smis(void)
{
/*
* Now that all APs have been relocated as well as the BSP let SMIs
@@ -415,13 +415,13 @@ static void enable_smis(void *unused)
}
static struct mp_flight_record mp_steps[] = {
- MP_FR_NOBLOCK_APS(relocate_and_load_microcode, NULL,
- relocate_and_load_microcode, NULL),
+ MP_FR_NOBLOCK_APS(relocate_and_load_microcode,
+ relocate_and_load_microcode),
#if IS_ENABLED(CONFIG_SMP)
- MP_FR_BLOCK_APS(mp_initialize_cpu, NULL, mp_initialize_cpu, NULL),
+ MP_FR_BLOCK_APS(mp_initialize_cpu, mp_initialize_cpu),
/* Wait for APs to finish initialization before proceeding. */
#endif
- MP_FR_BLOCK_APS(NULL, NULL, enable_smis, NULL),
+ MP_FR_BLOCK_APS(NULL, enable_smis),
};
static struct device_operations cpu_dev_ops = {