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authorMartin Roth <martinroth@chromium.org>2020-10-06 18:11:12 -0600
committerEdward O'Callaghan <quasisec@chromium.org>2020-10-08 01:21:56 +0000
commit0f3ef704bb8744f12d6c34b57ad7b0270070197a (patch)
treedf59285892015b7381d0b16037b8d2e5a53e66f6
parent4b34193d59b506132c0b7404fc0183680c7ae39b (diff)
downloadcoreboot-0f3ef704bb8744f12d6c34b57ad7b0270070197a.tar.xz
soc/amd/picasso: Print values from PSP transfer buffer
The PSP will now pass us data on the PSP boot mode and the production silicon level. Print these values out to save in the log. These definitions are in a vendorcode include directory that was previously only included in verstage. Add the include directory to all stages. BUG=b:170237834 TEST=Build & Boot - See values printed. BRANCH=Zork Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: Iee87413d1473786cf0e148a8088d27f8d24a47a1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Sam McNally <sammc@google.com>
-rw-r--r--src/soc/amd/picasso/Makefile.inc1
-rw-r--r--src/soc/amd/picasso/bootblock/bootblock.c1
-rw-r--r--src/soc/amd/picasso/bootblock/vboot_bootblock.c21
-rw-r--r--src/soc/amd/picasso/include/soc/psp_transfer.h2
4 files changed, 25 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index 1ed1529512..9757160d19 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -100,6 +100,7 @@ CPPFLAGS_common += -I$(src)/soc/amd/picasso
CPPFLAGS_common += -I$(src)/soc/amd/picasso/include
CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso
+CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include
MAINBOARD_BLOBS_DIR:=$(top)/3rdparty/blobs/mainboard/$(MAINBOARDDIR)
diff --git a/src/soc/amd/picasso/bootblock/bootblock.c b/src/soc/amd/picasso/bootblock/bootblock.c
index dfd5364a0a..c715324973 100644
--- a/src/soc/amd/picasso/bootblock/bootblock.c
+++ b/src/soc/amd/picasso/bootblock/bootblock.c
@@ -129,6 +129,7 @@ void bootblock_soc_init(void)
if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) {
verify_psp_transfer_buf();
+ show_psp_transfer_info();
}
fch_early_init();
diff --git a/src/soc/amd/picasso/bootblock/vboot_bootblock.c b/src/soc/amd/picasso/bootblock/vboot_bootblock.c
index 4c3ae4a317..3fbc4ef608 100644
--- a/src/soc/amd/picasso/bootblock/vboot_bootblock.c
+++ b/src/soc/amd/picasso/bootblock/vboot_bootblock.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/reset.h>
+#include <bl_uapp/bl_syscall_public.h>
#include <console/console.h>
#include <pc80/mc146818rtc.h>
#include <security/vboot/vbnv.h>
@@ -30,3 +31,23 @@ void verify_psp_transfer_buf(void)
cmos_write(CMOS_RECOVERY_MAGIC_VAL, CMOS_RECOVERY_BYTE);
warm_reset();
}
+
+void show_psp_transfer_info(void)
+{
+ struct transfer_info_struct *info = (struct transfer_info_struct *)
+ (void *)(uintptr_t)_transfer_buffer;
+
+ if (info->magic_val == TRANSFER_MAGIC_VAL) {
+ if ((info->psp_info & PSP_INFO_VALID) == 0) {
+ printk(BIOS_INFO, "No PSP info found in transfer buffer.\n");
+ return;
+ }
+
+ printk(BIOS_INFO, "PSP boot mode: %s\n",
+ info->psp_info & PSP_INFO_PRODUCTION_MODE ?
+ "Production" : "Development");
+ printk(BIOS_INFO, "Silicon level: %s\n",
+ info->psp_info & PSP_INFO_PRODUCTION_SILICON ?
+ "Production" : "Pre-Production");
+ }
+}
diff --git a/src/soc/amd/picasso/include/soc/psp_transfer.h b/src/soc/amd/picasso/include/soc/psp_transfer.h
index fdd7bd1fd9..afc4d7d1ac 100644
--- a/src/soc/amd/picasso/include/soc/psp_transfer.h
+++ b/src/soc/amd/picasso/include/soc/psp_transfer.h
@@ -44,6 +44,8 @@ _Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE, \
/* Make sure the PSP transferred information over to x86 side. */
void verify_psp_transfer_buf(void);
+/* Display the transfer block's PSP_info data */
+void show_psp_transfer_info(void);
#endif