diff options
author | Furquan Shaikh <furquan@google.com> | 2016-08-10 13:25:21 -0700 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2016-08-11 22:43:29 +0200 |
commit | 105828d12a36fa0cbb1a5025891722f1c0546ae8 (patch) | |
tree | fedf94781ac2458e99cd4986313dd2ac024bce51 | |
parent | 7f3ecedd776dc41a4d5dbaab8ef8146b8ba38ae3 (diff) | |
download | coreboot-105828d12a36fa0cbb1a5025891722f1c0546ae8.tar.xz |
reef: Update chromeos.fmd
1. Get rid of LBP2 partition
2. Shrink RO size
3. Increase RW-A and RW-B sizes
4. Increase RW_MRC_CACHE size
CQ-DEPEND=CL:366793
BUG=chrome-os-partner:52127, chrome-os-partner:55699,
chrome-os-partner:55778
BRANCH=None
TEST=Compiles successfully. Boots to OS.
Change-Id: Iad41d8cc7697e6d73f1aa2c699b0e8559349b77e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/16145
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r-- | src/mainboard/google/reef/chromeos.fmd | 31 |
1 files changed, 14 insertions, 17 deletions
diff --git a/src/mainboard/google/reef/chromeos.fmd b/src/mainboard/google/reef/chromeos.fmd index 286955d534..d25a9b28df 100644 --- a/src/mainboard/google/reef/chromeos.fmd +++ b/src/mainboard/google/reef/chromeos.fmd @@ -1,38 +1,35 @@ FLASH 16M { - WP_RO@0x0 0x800000 { + WP_RO@0x0 0x400000 { SI_DESC@0x0 0x1000 IFWI@0x1000 0x1ff000 RO_VPD@0x200000 0x4000 - RO_SECTION@0x204000 0x5fc000 { + RO_SECTION@0x204000 0x1fc000 { FMAP@0x0 0x800 RO_FRID@0x800 0x40 RO_FRID_PAD@0x840 0x7c0 COREBOOT(CBFS)@0x1000 0x17b000 GBB@0x17c000 0x40000 - RO_UNUSED_1@0x1bc000 0x400000 - # logical boot partition 2. Remove with updated CSE - SIGN_CSE@0x5bc000 0x10000 - RO_UNUSED_2@0x5cc000 0x30000 + RO_UNUSED@0x1bc000 0x40000 } } - MISC_RW@0x800000 0x1a000 { - RW_MRC_CACHE@0x0 0x10000 - RW_ELOG@0x10000 0x4000 - RW_SHARED@0x14000 0x4000 { + MISC_RW@0x400000 0x4a000 { + RW_MRC_CACHE@0x0 0x40000 + RW_ELOG@0x40000 0x4000 + RW_SHARED@0x44000 0x4000 { SHARED_DATA@0x0 0x2000 VBLOCK_DEV@0x2000 0x2000 } - RW_VPD@0x18000 0x2000 + RW_VPD@0x48000 0x2000 } - RW_SECTION_A@0x81a000 0x28f800 { + RW_SECTION_A@0x44a000 0x477800 { VBLOCK_A@0x0 0x10000 - FW_MAIN_A(CBFS)@0x10000 0x27f7c0 - RW_FWID_A@0x28f7c0 0x40 + FW_MAIN_A(CBFS)@0x10000 0x4677c0 + RW_FWID_A@0x4777c0 0x40 } - RW_SECTION_B@0xaa9800 0x28f800 { + RW_SECTION_B@0x8c1800 0x477800 { VBLOCK_B@0x0 0x10000 - FW_MAIN_B(CBFS)@0x10000 0x27f7c0 - RW_FWID_B@0x28f7c0 0x40 + FW_MAIN_B(CBFS)@0x10000 0x4677c0 + RW_FWID_B@0x4777c0 0x40 } RW_NVRAM@0xd39000 0x6000 RW_LEGACY(CBFS)@0xd3f000 0x200000 |