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| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2015-01-04 16:34:03 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2015-01-04 13:48:38 +0100 |
| commit | 117849ef4d02fe3888fac1742511ca812cac811b (patch) | |
| tree | d0b8af6a98ff8fa6a02b26dab194470a151c6c5c | |
| parent | c3e77fc95380560f21dba7923b4aaa4ec35864c8 (diff) | |
| download | coreboot-117849ef4d02fe3888fac1742511ca812cac811b.tar.xz | |
superio/smsc/lpc47b272: Use link-time symbols over .c inclusion
Change-Id: Id3d5f2a120c0a933c031102f206829305da20f0c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8081
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
| -rw-r--r-- | src/mainboard/asus/mew-vm/romstage.c | 2 | ||||
| -rw-r--r-- | src/superio/smsc/lpc47b272/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/superio/smsc/lpc47b272/early_serial.c | 4 | ||||
| -rw-r--r-- | src/superio/smsc/lpc47b272/lpc47b272.h | 11 |
4 files changed, 13 insertions, 5 deletions
diff --git a/src/mainboard/asus/mew-vm/romstage.c b/src/mainboard/asus/mew-vm/romstage.c index d2d418606b..3c67af3fdd 100644 --- a/src/mainboard/asus/mew-vm/romstage.c +++ b/src/mainboard/asus/mew-vm/romstage.c @@ -24,7 +24,7 @@ #include <device/pnp_def.h> #include <stdlib.h> #include <console/console.h> -#include "superio/smsc/lpc47b272/early_serial.c" +#include <superio/smsc/lpc47b272/lpc47b272.h> #include "northbridge/intel/i82810/raminit.h" #include "cpu/x86/bist.h" #include "southbridge/intel/i82801ax/i82801ax.h" diff --git a/src/superio/smsc/lpc47b272/Makefile.inc b/src/superio/smsc/lpc47b272/Makefile.inc index 680e937f77..8102229db5 100644 --- a/src/superio/smsc/lpc47b272/Makefile.inc +++ b/src/superio/smsc/lpc47b272/Makefile.inc @@ -18,4 +18,5 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +romstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += early_serial.c ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += superio.c diff --git a/src/superio/smsc/lpc47b272/early_serial.c b/src/superio/smsc/lpc47b272/early_serial.c index 3624df272f..88afca556f 100644 --- a/src/superio/smsc/lpc47b272/early_serial.c +++ b/src/superio/smsc/lpc47b272/early_serial.c @@ -21,6 +21,8 @@ /* Pre-RAM driver for SMSC LPC47B272 Super I/O chip. */ #include <arch/io.h> +#include <device/pnp.h> +#include <stdint.h> #include "lpc47b272.h" static void pnp_enter_conf_state(pnp_devfn_t dev) @@ -42,7 +44,7 @@ static void pnp_exit_conf_state(pnp_devfn_t dev) * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param iobase Processor I/O port address to assign to this serial device. */ -static void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase) +void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); diff --git a/src/superio/smsc/lpc47b272/lpc47b272.h b/src/superio/smsc/lpc47b272/lpc47b272.h index cbfdb1307b..a311708518 100644 --- a/src/superio/smsc/lpc47b272/lpc47b272.h +++ b/src/superio/smsc/lpc47b272/lpc47b272.h @@ -18,8 +18,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef SUPERIO_SMSC_LPC47B272_LPC47B272_H -#define SUPERIO_SMSC_LPC47B272_LPC47B272_H +#ifndef SUPERIO_SMSC_LPC47B272_H +#define SUPERIO_SMSC_LPC47B272_H #define LPC47B272_FDC 0 /* Floppy */ #define LPC47B272_PP 3 /* Parallel Port */ @@ -30,4 +30,9 @@ #define LPC47B272_MAX_CONFIG_REGISTER 0x5F -#endif +#include <arch/io.h> +#include <stdint.h> + +void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase); + +#endif /* SUPERIO_SMSC_LPC47B272_H */ |