diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-12-05 04:25:44 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-12-06 07:39:26 +0100 |
| commit | 14581fc632186ddaad10deb764dd9d87dec5284e (patch) | |
| tree | 955627af469374c6efa9401ec5a995b2fda68822 | |
| parent | e2b15d569a6e9461d4ecdafdbbbcadfa546012d6 (diff) | |
| download | coreboot-14581fc632186ddaad10deb764dd9d87dec5284e.tar.xz | |
mainboard/lenovo/g505s: Toggle on IOMMU support
Toggle on in devicetree.cb and build into AGESA by buildOpts.c.
Add ACPI and MPTABLES interrupt routers for IOMMU also.
Change-Id: Ia838f9b70f09ed1180daeb5382edc08c4b74946c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7643
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
| -rw-r--r-- | src/mainboard/lenovo/g505s/acpi/routing.asl | 5 | ||||
| -rw-r--r-- | src/mainboard/lenovo/g505s/buildOpts.c | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/g505s/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/lenovo/g505s/mptable.c | 6 |
4 files changed, 13 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/g505s/acpi/routing.asl b/src/mainboard/lenovo/g505s/acpi/routing.asl index 108e204a8c..d315e09f4b 100644 --- a/src/mainboard/lenovo/g505s/acpi/routing.asl +++ b/src/mainboard/lenovo/g505s/acpi/routing.asl @@ -22,6 +22,11 @@ Name(PR0, Package(){ /* NB devices */ /* Bus 0, Dev 0 - F15 Host Controller */ + Package(){0x0000FFFF, 0, INTA, 0 }, + Package(){0x0000FFFF, 1, INTB, 0 }, + Package(){0x0000FFFF, 2, INTC, 0 }, + Package(){0x0000FFFF, 3, INTD, 0 }, + /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */ Package(){0x0001FFFF, 0, INTB, 0 }, Package(){0x0001FFFF, 1, INTC, 0 }, diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c index 6d32fe858f..9ed4c74c80 100644 --- a/src/mainboard/lenovo/g505s/buildOpts.c +++ b/src/mainboard/lenovo/g505s/buildOpts.c @@ -186,7 +186,7 @@ #define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE #endif -#define BLDCFG_IOMMU_SUPPORT FALSE +#define BLDCFG_IOMMU_SUPPORT TRUE #define BLDCFG_CFG_GNB_HD_AUDIO TRUE //#define BLDCFG_IGPU_SUBSYSTEM_ID OEM_IGPU_SSID diff --git a/src/mainboard/lenovo/g505s/devicetree.cb b/src/mainboard/lenovo/g505s/devicetree.cb index e9718baafc..5e79c030e2 100644 --- a/src/mainboard/lenovo/g505s/devicetree.cb +++ b/src/mainboard/lenovo/g505s/devicetree.cb @@ -30,6 +30,7 @@ chip northbridge/amd/agesa/family15rl/root_complex chip northbridge/amd/agesa/family15rl # PCI side of HT root complex device pci 0.0 on end # Root Complex + device pci 0.2 on end # IOMMU device pci 1.0 on end # Internal Graphics P2P bridge 0x99XX device pci 1.1 on end # Internal Multimedia device pci 2.0 off end diff --git a/src/mainboard/lenovo/g505s/mptable.c b/src/mainboard/lenovo/g505s/mptable.c index f47b9d9495..65b1279e47 100644 --- a/src/mainboard/lenovo/g505s/mptable.c +++ b/src/mainboard/lenovo/g505s/mptable.c @@ -118,6 +118,12 @@ static void *smp_write_config_table(void *v) #define PCI_INT(bus, dev, int_sign, pin) \ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + /* IOMMU */ + PCI_INT(0x0, 0x00, 0x0, 0x10); + PCI_INT(0x0, 0x00, 0x1, 0x11); + PCI_INT(0x0, 0x00, 0x2, 0x12); + PCI_INT(0x0, 0x00, 0x3, 0x13); + /* Internal VGA */ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); |