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authorVadim Bendebury <vbendeb@chromium.org>2014-08-07 15:20:21 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-03-28 08:48:11 +0100
commit1de971dd3202a02492e5738b40595afaa8aca153 (patch)
tree229ddf553e3dfa280bbbafa866597ee737ae47e1
parentc6d30405f2c3beb47690745eeae4684e18d4be05 (diff)
downloadcoreboot-1de971dd3202a02492e5738b40595afaa8aca153.tar.xz
storm: reset TPM properly on proto0
The proto0 storm hardware has the TPM reset line wired to the SOC GPIO22 pin instead of the system reset. This causes all kind of TPM behavior problems and requires frequent power cycles. Adding explicit TPM reset makes all those problems go away. BUG=chrome-os-partner:30705, chrome-os-partner:30829 TEST=tried resetting proto0 at different moments during boot up - the TPM does not fail anymore. Change-Id: Idfa16e6e868336f38861edeb75703fff3f35172c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d5e07815c227089b7f266ba5329812bf309b87e6 Original-Change-Id: Ia877fcd9efaf3ba12c8fe8c2958bd81c4bf22799 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/211497 Original-Reviewed-by: Trevor Bourget <tbourget@codeaurora.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/9118 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--src/mainboard/google/storm/mainboard.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/src/mainboard/google/storm/mainboard.c b/src/mainboard/google/storm/mainboard.c
index 8982f919ae..ded423aa9f 100644
--- a/src/mainboard/google/storm/mainboard.c
+++ b/src/mainboard/google/storm/mainboard.c
@@ -18,10 +18,12 @@
*/
#include <arch/cache.h>
+#include <boardid.h>
#include <boot/coreboot_tables.h>
#include <console/console.h>
-#include <device/device.h>
#include <delay.h>
+#include <device/device.h>
+#include <gpiolib.h>
#include <string.h>
#include <soc/qualcomm/ipq806x/include/clock.h>
@@ -71,10 +73,29 @@ static void setup_mmu(void)
dcache_mmu_enable();
}
+#define TPM_RESET_GPIO 22
+static void setup_tpm(void)
+{
+ if (board_id() != 0)
+ return; /* Only proto0 have TPM reset connected to GPIO22 */
+
+ gpio_tlmm_config_set(TPM_RESET_GPIO, FUNC_SEL_GPIO, GPIO_PULL_UP,
+ GPIO_4MA, GPIO_ENABLE);
+ /*
+ * Generate a reset pulse. The spec calls for 80 us minimum, let's
+ * make it twice as long. If the output was driven low originally, the
+ * reset pulse will be even longer.
+ */
+ gpio_set_out_value(TPM_RESET_GPIO, 0);
+ udelay(160);
+ gpio_set_out_value(TPM_RESET_GPIO, 1);
+}
+
static void mainboard_init(device_t dev)
{
setup_mmu();
setup_usb();
+ setup_tpm();
}
static void mainboard_enable(device_t dev)