diff options
author | Lin Huang <hl@rock-chips.com> | 2018-01-18 11:24:28 +0800 |
---|---|---|
committer | Julius Werner <jwerner@chromium.org> | 2018-01-29 19:22:26 +0000 |
commit | 3c0d7cfb947d12bdadc5d1898d23d29c93e0ec03 (patch) | |
tree | e96f500595254e59ab86009fd67085013b524a69 | |
parent | 0499ce9f8319cac1078f4b2423e4e7b420611943 (diff) | |
download | coreboot-3c0d7cfb947d12bdadc5d1898d23d29c93e0ec03.tar.xz |
google/scarlet: Add initialization sequence for Innolux P097PFG panel
Innolux didn't deliver a working init sequence yet for devices without
OTP programming. The sequence in this change has been derived from a
register dump of a mostly working panel with OTP. It is not meant to
be final, but to make devices with unprogrammed OTP work, while Innolux
is figuring out a proper sequence. There is a known issue with an
artifact line in the lower third of the display.
Change-Id: I7096506208e4cb29c5f31a7ac502231a6c23ac92
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://review.coreboot.org/23311
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
-rw-r--r-- | src/mainboard/google/gru/mainboard.c | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c index 101d7cd477..3ab26fc4a6 100644 --- a/src/mainboard/google/gru/mainboard.c +++ b/src/mainboard/google/gru/mainboard.c @@ -376,6 +376,106 @@ void mainboard_power_on_backlight(void) prepare_backlight_i2c(); } +static struct panel_init_command innolux_p097pfg_init_cmds[] = { + /* page 0 */ + MIPI_INIT_CMD(0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00), + MIPI_INIT_CMD(0xb1, 0xe8, 0x11), + MIPI_INIT_CMD(0xb2, 0x25, 0x02), + MIPI_INIT_CMD(0xb5, 0x08, 0x00), + MIPI_INIT_CMD(0xbc, 0x0f, 0x00), + MIPI_INIT_CMD(0xb8, 0x03, 0x06, 0x00, 0x00), + MIPI_INIT_CMD(0xbd, 0x01, 0x90, 0x14, 0x14), + MIPI_INIT_CMD(0xc0, 0x17), + MIPI_INIT_CMD(0xc1, 0x17), + MIPI_INIT_CMD(0xd9, 0x01, 0x09, 0x70), + MIPI_INIT_CMD(0xc5, 0x12, 0x21, 0x00), + MIPI_INIT_CMD(0xbb, 0x23, 0x23), + + /* page 1 */ + MIPI_INIT_CMD(0xf0, 0x55, 0xaa, 0x52, 0x08, 0x01), + MIPI_INIT_CMD(0xb3, 0x2d, 0x2d), + MIPI_INIT_CMD(0xb4, 0x19, 0x19), + MIPI_INIT_CMD(0xb9, 0x36, 0x36), + MIPI_INIT_CMD(0xba, 0x35, 0x35), + MIPI_INIT_CMD(0xca, 0x01), + MIPI_INIT_CMD(0xce, 0x04), + MIPI_INIT_CMD(0xc3, 0x14, 0x14), + MIPI_INIT_CMD(0xd8, 0xc0, 0x03), + MIPI_INIT_CMD(0xbc, 0x5a, 0x01), + MIPI_INIT_CMD(0xbd, 0x76, 0x01), + + /* page 2 */ + MIPI_INIT_CMD(0xf0, 0x55, 0xaa, 0x52, 0x08, 0x02), + MIPI_INIT_CMD(0xb0, 0x00), + MIPI_INIT_CMD(0xd1, 0x00, 0x37, 0x00, 0x61, 0x00, 0x92), + MIPI_INIT_CMD(0xd2, 0x01, 0x6b, 0x01, 0xa7, 0x01, 0xd3), + MIPI_INIT_CMD(0xd3, 0x02, 0xe2, 0x03, 0x0f, 0x03, 0x30), + MIPI_INIT_CMD(0xd4, 0x03, 0xba, 0x03, 0xc1), + MIPI_INIT_CMD(0xe0, 0x00, 0x37, 0x00, 0x61, 0x00, 0x92), + MIPI_INIT_CMD(0xe1, 0x01, 0x6b, 0x01, 0xa7, 0x01, 0xd3), + MIPI_INIT_CMD(0xe2, 0x02, 0xe2, 0x03, 0x0f, 0x03, 0x30), + MIPI_INIT_CMD(0xe3, 0x03, 0xba, 0x03, 0xc1), + + /* page 3 */ + MIPI_INIT_CMD(0xf0, 0x55, 0xaa, 0x52, 0x08, 0x03), + MIPI_INIT_CMD(0xb0, 0x00, 0x00, 0x00, 0x00), + MIPI_INIT_CMD(0xb1, 0x00, 0x00, 0x00, 0x00), + MIPI_INIT_CMD(0xb2, 0x00, 0x00, 0x06, 0x04, 0x00, 0xb0, 0x75), + MIPI_INIT_CMD(0xb3, 0x10, 0x07, 0xfd, 0x04, 0x00, 0xb0, 0x75), + MIPI_INIT_CMD(0xb6, 0xf0, 0x05, 0x07, 0x03, 0x00), + MIPI_INIT_CMD(0xba, 0xc5, 0x07, 0x00, 0x04, 0x01, 0xb0, 0x75), + MIPI_INIT_CMD(0xbb, 0xc5, 0x07, 0x00, 0x03, 0x01, 0xb0, 0x75), + MIPI_INIT_CMD(0xc0, 0x00, 0x3c, 0x00, 0x00, 0x00, 0x80, 0x80), + MIPI_INIT_CMD(0xc1, 0x00, 0x3c, 0x00, 0x00, 0x00, 0x80, 0x80), + MIPI_INIT_CMD(0xc4, 0x00, 0x00), + MIPI_INIT_CMD(0xef, 0x41), + + /* page 4 */ + MIPI_INIT_CMD(0xf0, 0x55, 0xaa, 0x52, 0x08, 0x04), + MIPI_INIT_CMD(0xec, 0x4c), + + /* page 5 */ + MIPI_INIT_CMD(0xf0, 0x55, 0xaa, 0x52, 0x08, 0x05), + MIPI_INIT_CMD(0xb0, 0x13, 0x03, 0x03, 0x01), + MIPI_INIT_CMD(0xb1, 0x30, 0x00), + MIPI_INIT_CMD(0xb2, 0x02, 0x02, 0x00), + MIPI_INIT_CMD(0xb3, 0x82, 0x23, 0x82, 0x38), + MIPI_INIT_CMD(0xb4, 0xc5, 0x75, 0x24, 0x57), + MIPI_INIT_CMD(0xb5, 0x00, 0xd4, 0x72, 0x11, 0x11, 0xab, 0x0a), + MIPI_INIT_CMD(0xb6, 0x00, 0x00, 0xd5, 0x72, 0x24, 0x56), + MIPI_INIT_CMD(0xb7, 0x5c, 0xdc, 0x5c, 0x5c), + MIPI_INIT_CMD(0xb9, 0x0c, 0x00, 0x00, 0x01, 0x00), + MIPI_INIT_CMD(0xc0, 0x75, 0x11, 0x11, 0x54, 0x05), + MIPI_INIT_CMD(0xc6, 0x00, 0x00, 0x00, 0x00), + MIPI_INIT_CMD(0xd0, 0x00, 0x48, 0x0a, 0x00, 0x00), + MIPI_INIT_CMD(0xd1, 0x00, 0x48, 0x0b, 0x00, 0x00), + + /* page 6 */ + MIPI_INIT_CMD(0xf0, 0x55, 0xaa, 0x52, 0x08, 0x06), + MIPI_INIT_CMD(0xb0, 0x02, 0x32, 0x32, 0x08, 0x2f), + MIPI_INIT_CMD(0xb1, 0x2e, 0x15, 0x14, 0x13, 0x12), + MIPI_INIT_CMD(0xb2, 0x11, 0x10, 0x00, 0x3d, 0x3d), + MIPI_INIT_CMD(0xb3, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d), + MIPI_INIT_CMD(0xb4, 0x3d, 0x32), + MIPI_INIT_CMD(0xb5, 0x03, 0x32, 0x32, 0x09, 0x2f), + MIPI_INIT_CMD(0xb6, 0x2e, 0x1b, 0x1a, 0x19, 0x18), + MIPI_INIT_CMD(0xb7, 0x17, 0x16, 0x01, 0x3d, 0x3d), + MIPI_INIT_CMD(0xb8, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d), + MIPI_INIT_CMD(0xb9, 0x3d, 0x32), + MIPI_INIT_CMD(0xc0, 0x00, 0x32, 0x32, 0x08, 0x2f), + MIPI_INIT_CMD(0xc1, 0x2e, 0x10, 0x11, 0x12, 0x13), + MIPI_INIT_CMD(0xc2, 0x14, 0x15, 0x02, 0x3d, 0x3d), + MIPI_INIT_CMD(0xc3, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d), + MIPI_INIT_CMD(0xc4, 0x3d, 0x3d), + MIPI_INIT_CMD(0xc5, 0x01, 0x32, 0x32, 0x09, 0x2f), + MIPI_INIT_CMD(0xc6, 0x2e, 0x16, 0x17, 0x18, 0x19), + MIPI_INIT_CMD(0xc7, 0x1a, 0x1b, 0x03, 0x3d, 0x3d), + MIPI_INIT_CMD(0xc8, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d), + MIPI_INIT_CMD(0xc9, 0x3d, 0x3d), + + {}, +}; + static struct panel_init_command kd097d04_init_commands[] = { /* voltage setting */ MIPI_INIT_CMD(0xB0, 0x00), @@ -540,6 +640,7 @@ const struct mipi_panel_data inx097pfg_panel = { .lanes = 8, .display_on_udelay = 120000, .video_mode_udelay = 5000, + .init_cmd = innolux_p097pfg_init_cmds, }; static const struct edid_mode inx097pfg_edid_mode = { |