diff options
author | Julius Werner <jwerner@chromium.org> | 2017-07-14 14:30:29 -0700 |
---|---|---|
committer | Julius Werner <jwerner@chromium.org> | 2017-07-19 18:15:15 +0000 |
commit | 6486e7819ccf4acf923d934d4293861f394cc065 (patch) | |
tree | 5b90d178a021829b9e268b9229b5e9e843668b32 | |
parent | 4ed8b305539f661895d9fa950bb32fc653e37f47 (diff) | |
download | coreboot-6486e7819ccf4acf923d934d4293861f394cc065.tar.xz |
google/gru: Add support for Scarlet rev1
This patch adds the necessary changes to support Scarlet revision 1.
Since the differences to revision 0 are so deep, we have decided not to
continue support for it in the same image. Therefore, this patch will
break Scarlet rev0.
All the deviations from other Gru boards are currently guarded by
CONFIG_BOARD_GOOGLE_SCARLET. This should be changed later if we
introduce more variants based on the newer Scarlet board design.
Change-Id: I7a7cc11d9387ac1d856663326e35cfa5371e0af2
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/20587
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
-rw-r--r-- | src/mainboard/google/gru/Kconfig | 5 | ||||
-rw-r--r-- | src/mainboard/google/gru/board.h | 26 | ||||
-rw-r--r-- | src/mainboard/google/gru/bootblock.c | 31 | ||||
-rw-r--r-- | src/mainboard/google/gru/mainboard.c | 44 | ||||
-rw-r--r-- | src/mainboard/google/gru/pwm_regulator.c | 27 | ||||
-rw-r--r-- | src/mainboard/google/gru/romstage.c | 11 |
6 files changed, 101 insertions, 43 deletions
diff --git a/src/mainboard/google/gru/Kconfig b/src/mainboard/google/gru/Kconfig index 9243251fbb..b66dab48df 100644 --- a/src/mainboard/google/gru/Kconfig +++ b/src/mainboard/google/gru/Kconfig @@ -75,6 +75,11 @@ config DRIVER_TPM_I2C_ADDR hex default 0x20 +config DRIVER_TPM_SPI_BUS + hex + default 0x2 if BOARD_GOOGLE_SCARLET + default 0x0 + config CONSOLE_SERIAL_UART_ADDRESS hex depends on DRIVERS_UART diff --git a/src/mainboard/google/gru/board.h b/src/mainboard/google/gru/board.h index 8acbe34c92..f240dcf0ab 100644 --- a/src/mainboard/google/gru/board.h +++ b/src/mainboard/google/gru/board.h @@ -17,18 +17,36 @@ #ifndef __COREBOOT_SRC_MAINBOARD_GOOGLE_GRU_BOARD_H #define __COREBOOT_SRC_MAINBOARD_GOOGLE_GRU_BOARD_H +#include <assert.h> #include <gpio.h> +#define GPIO_POWEROFF GPIO(1, A, 6) +#define GPIO_RESET GPIO(0, B, 3) +#define GPIO_SDMMC_PWR GPIO(4, D, 5) + +#if IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET) +#define GPIO_BACKLIGHT GPIO(4, C, 5) +#define GPIO_EC_IN_RW GPIO(0, A, 1) +#define GPIO_EC_IRQ GPIO(1, C, 2) +#define GPIO_P15V_EN dead_code_t(gpio_t, "PP1500 doesn't exist on Scarlet") +#define GPIO_P18V_AUDIO_PWREN dead_code_t(gpio_t, "doesn't exist on Scarlet") +#define GPIO_P30V_EN dead_code_t(gpio_t, "PP3000 doesn't exist on Scarlet") +#define GPIO_TP_RST_L dead_code_t(gpio_t, "don't need TP_RST_L on Scarlet") +#define GPIO_TPM_IRQ GPIO(1, C, 1) +#define GPIO_WLAN_RST_L dead_code_t(gpio_t, "no WLAN reset on Scarlet in FW") +#define GPIO_WP GPIO(0, B, 5) +#else #define GPIO_BACKLIGHT GPIO(1, C, 1) #define GPIO_EC_IN_RW GPIO(3, B, 0) #define GPIO_EC_IRQ GPIO(0, A, 1) -#define GPIO_POWEROFF GPIO(1, A, 6) -#define GPIO_RESET GPIO(0, B, 3) -#define GPIO_WP GPIO(1, C, 2) #define GPIO_P15V_EN GPIO(0, B, 2) +#define GPIO_P18V_AUDIO_PWREN GPIO(0, A, 2) #define GPIO_P30V_EN GPIO(0, B, 4) -#define GPIO_P18V_AUDIO_PWREN GPIO(0, A, 2) +#define GPIO_TP_RST_L GPIO(3, B, 4) /* may also be an I2C pull-up enable */ #define GPIO_TPM_IRQ GPIO(0, A, 5) +#define GPIO_WLAN_RST_L GPIO(1, B, 3) +#define GPIO_WP GPIO(1, C, 2) +#endif void setup_chromeos_gpios(void); diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c index 4320fcedad..7359f2a302 100644 --- a/src/mainboard/google/gru/bootblock.c +++ b/src/mainboard/google/gru/bootblock.c @@ -44,12 +44,12 @@ void bootblock_mainboard_early_init(void) */ write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 0)); - /* - * Let's enable these power rails here, we are already running the SPI - * Flash based code. - */ - gpio_output(GPIO(0, B, 2), 1); /* PP1500_EN */ - gpio_output(GPIO(0, B, 4), 1); /* PP3000_EN */ + if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) { + /* Enable rails powering GPIO blocks, among other things. + These are EC-controlled on Scarlet and already on. */ + gpio_output(GPIO_P15V_EN, 1); + gpio_output(GPIO_P30V_EN, 1); + } #if IS_ENABLED(CONFIG_DRIVERS_UART) _Static_assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE, @@ -92,14 +92,21 @@ static void configure_ec(void) static void configure_tpm(void) { if (IS_ENABLED(CONFIG_GRU_HAS_TPM2)) { - gpio_input(GPIO(3, A, 4)); /* SPI0_MISO remove pull-up */ - gpio_input(GPIO(3, A, 5)); /* SPI0_MOSI remove pull-up */ - gpio_input(GPIO(3, A, 6)); /* SPI0_CLK remove pull-up */ - gpio_input_pullup(GPIO(3, A, 7)); /* SPI0_CS confirm */ - rockchip_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1500*KHz); - write32(&rk3399_grf->iomux_spi0, IOMUX_SPI0); + if (IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) { + gpio_input(GPIO(2, B, 1)); /* SPI2_MISO no-pull */ + gpio_input(GPIO(2, B, 2)); /* SPI2_MOSI no-pull */ + gpio_input(GPIO(2, B, 3)); /* SPI2_CLK no-pull */ + gpio_input_pullup(GPIO(2, B, 4)); /* SPI2_CS */ + write32(&rk3399_grf->iomux_spi2, IOMUX_SPI2); + } else { + gpio_input(GPIO(3, A, 4)); /* SPI0_MISO no-pull */ + gpio_input(GPIO(3, A, 5)); /* SPI0_MOSI no-pull */ + gpio_input(GPIO(3, A, 6)); /* SPI0_CLK no-pull */ + gpio_input_pullup(GPIO(3, A, 7)); /* SPI0_CS */ + write32(&rk3399_grf->iomux_spi0, IOMUX_SPI0); + } gpio_input_irq(GPIO_TPM_IRQ, IRQ_TYPE_EDGE_RISING); } else { diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c index fa127edf82..2542d74106 100644 --- a/src/mainboard/google/gru/mainboard.c +++ b/src/mainboard/google/gru/mainboard.c @@ -34,21 +34,21 @@ /* * We have to drive the stronger pull-up within 1 second of powering up the - * touchpad to prevent its firmware from falling into recovery. + * touchpad to prevent its firmware from falling into recovery. Not on Scarlet. */ static void configure_touchpad(void) { - gpio_output(GPIO(3, B, 4), 1); /* TP's I2C pull-up rail */ + gpio_output(GPIO_TP_RST_L, 1); /* TP's I2C pull-up rail */ } /* * Wifi's PDN/RST line is pulled down by its (unpowered) voltage rails, but * this reset pin is pulled up by default. Let's drive it low as early as we - * can. + * can. Scarlet uses a different WiFi chip that doesn't have this pin anymore. */ -static void deassert_wifi_power(void) +static void assert_wifi_reset(void) { - gpio_output(GPIO(1, B, 3), 0); /* Assert WLAN_MODULE_RST# */ + gpio_output(GPIO_WLAN_RST_L, 0); /* Assert WLAN_MODULE_RST# */ } static void configure_emmc(void) @@ -234,11 +234,21 @@ static void configure_codec(void) static void configure_display(void) { - /* set pinmux for edp HPD*/ - gpio_input_pulldown(GPIO(4, C, 7)); - write32(&rk3399_grf->iomux_edp_hotplug, IOMUX_EDP_HOTPLUG); - - gpio_output(GPIO(4, D, 3), 1); /* CPU3_EDP_VDDEN for P3.3V_DISP */ + if (IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) { + gpio_output(GPIO(4, D, 1), 0); /* DISPLAY_RST_L */ + gpio_output(GPIO(4, D, 3), 1); /* PPVARP_LCD */ + mdelay(10); + gpio_output(GPIO(4, D, 4), 1); /* PPVARN_LCD */ + mdelay(20 + 2); /* add 2ms for bias rise time */ + gpio_output(GPIO(4, D, 1), 1); /* DISPLAY_RST_L */ + mdelay(30); + } else { + /* set pinmux for edp HPD */ + gpio_input_pulldown(GPIO(4, C, 7)); + write32(&rk3399_grf->iomux_edp_hotplug, IOMUX_EDP_HOTPLUG); + + gpio_output(GPIO(4, D, 3), 1); /* P3.3V_DISP */ + } } static void usb_power_cycle(int port) @@ -321,18 +331,20 @@ static void setup_usb(int port) static void mainboard_init(device_t dev) { - deassert_wifi_power(); - configure_touchpad(); configure_sdmmc(); configure_emmc(); configure_codec(); - configure_display(); + if (display_init_required()) + configure_display(); setup_usb(0); - if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) - setup_usb(1); + if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) { + assert_wifi_reset(); /* Scarlet: no WIFI_PD# line */ + configure_touchpad(); /* Scarlet: works differently */ + setup_usb(1); /* Scarlet: only one USB port */ + register_gpio_suspend(); /* Scarlet: all EC-controlled */ + } register_reset_to_bl31(); register_poweroff_to_bl31(); - register_gpio_suspend(); register_apio_suspend(); } diff --git a/src/mainboard/google/gru/pwm_regulator.c b/src/mainboard/google/gru/pwm_regulator.c index b85f41ff45..696f09a206 100644 --- a/src/mainboard/google/gru/pwm_regulator.c +++ b/src/mainboard/google/gru/pwm_regulator.c @@ -47,10 +47,23 @@ int pwm_design_voltage[][2] = { [PWM_REGULATOR_CENTERLOG] = {7994, 10499} }; +int pwm_enum_to_pwm_number[] = { + [PWM_REGULATOR_GPU] = 0, + [PWM_REGULATOR_LIT] = 2, +#if IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET) + [PWM_REGULATOR_BIG] = 3, + [PWM_REGULATOR_CENTERLOG] = -1, /* fixed regulator on Scarlet */ +#else + [PWM_REGULATOR_BIG] = 1, + [PWM_REGULATOR_CENTERLOG] = 3, +#endif +}; + void pwm_regulator_configure(enum pwm_regulator pwm, int millivolt) { int duty_ns, voltage_max, voltage_min; int voltage = millivolt * 10; /* for higer calculation accuracy */ + int pwm_number = pwm_enum_to_pwm_number[pwm]; voltage_min = pwm_design_voltage[pwm][0]; voltage_max = pwm_design_voltage[pwm][1]; @@ -75,24 +88,26 @@ void pwm_regulator_configure(enum pwm_regulator pwm, int millivolt) duty_ns = PWM_PERIOD * (voltage_max - voltage) / (voltage_max - voltage_min); - pwm_init(pwm, PWM_PERIOD, duty_ns); + pwm_init(pwm_number, PWM_PERIOD, duty_ns); - switch (pwm) { - case PWM_REGULATOR_GPU: + switch (pwm_number) { + case 0: gpio_input(GPIO(4, C, 2)); /* PWM0 remove pull-down */ write32(&rk3399_grf->iomux_pwm_0, IOMUX_PWM_0); break; - case PWM_REGULATOR_BIG: + case 1: gpio_input(GPIO(4, C, 6)); /* PWM1 remove pull-down */ write32(&rk3399_grf->iomux_pwm_1, IOMUX_PWM_1); break; - case PWM_REGULATOR_LIT: + case 2: gpio_input(GPIO(1, C, 3)); /* PWM2 remove pull-down */ write32(&rk3399_pmugrf->iomux_pwm_2, IOMUX_PWM_2); break; - case PWM_REGULATOR_CENTERLOG: + case 3: gpio_input(GPIO(0, A, 6)); /* PWM3 remove pull-down */ write32(&rk3399_pmugrf->iomux_pwm_3a, IOMUX_PWM_3_A); break; + default: + die("incorrect board configuration"); } } diff --git a/src/mainboard/google/gru/romstage.c b/src/mainboard/google/gru/romstage.c index d644f7d7c2..bde61b28aa 100644 --- a/src/mainboard/google/gru/romstage.c +++ b/src/mainboard/google/gru/romstage.c @@ -33,6 +33,7 @@ #include <soc/usb.h> #include <stdlib.h> +#include "board.h" #include "pwm_regulator.h" static void init_dvs_outputs(void) @@ -40,10 +41,11 @@ static void init_dvs_outputs(void) pwm_regulator_configure(PWM_REGULATOR_GPU, 900); pwm_regulator_configure(PWM_REGULATOR_BIG, 900); - /* Kevin's logic rail has some ripple, so up the voltage a bit */ + /* Kevin's logic rail has some ripple, so up the voltage a bit. Scarlet + uses a fixed 900mV regulator for centerlogic. */ if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN)) pwm_regulator_configure(PWM_REGULATOR_CENTERLOG, 925); - else + else if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) pwm_regulator_configure(PWM_REGULATOR_CENTERLOG, 900); /* Allow time for the regulators to settle */ @@ -52,9 +54,8 @@ static void init_dvs_outputs(void) static void prepare_sdmmc(void) { - /* Enable main SD rail early to allow ramp time before enabling SDIO - * rail. */ - gpio_output(GPIO(4, D, 5), 1); /* SDMMC_PWR_EN */ + /* Enable main SD rail early to allow ramp time before powering SDIO. */ + gpio_output(GPIO_SDMMC_PWR, 1); } static void prepare_usb(void) |