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authorIru Cai <mytbk920423@gmail.com>2020-12-15 21:12:21 +0800
committerIru Cai <mytbk920423@gmail.com>2020-12-28 21:30:33 +0800
commit65223d8dd059e7b0c97f381fa26ca26943e576a8 (patch)
tree75412d149f932652d9996060e33ebd016a74eb1b
parentab0dc016e2ac449b64e064812123d6d4bb0d29f9 (diff)
downloadcoreboot-65223d8dd059e7b0c97f381fa26ca26943e576a8.tar.xz
dell/e7240: add bdw version
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/Kconfig35
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/Kconfig.name2
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/Makefile.inc5
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/acpi/ec.asl14
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/acpi/platform.asl12
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/acpi/superio.asl3
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/acpi_tables.c11
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/board_info.txt7
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/bootblock.c13
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/devicetree.cb63
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/dsdt.asl24
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/gma-mainboard.ads17
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/gpio.c110
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/hda_verb.c25
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/mainboard.c14
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/pei_data.c28
-rw-r--r--src/mainboard/dell/latitude_e7240_bdw/romstage.c15
17 files changed, 398 insertions, 0 deletions
diff --git a/src/mainboard/dell/latitude_e7240_bdw/Kconfig b/src/mainboard/dell/latitude_e7240_bdw/Kconfig
new file mode 100644
index 0000000000..d7c4506dbe
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/Kconfig
@@ -0,0 +1,35 @@
+if BOARD_DELL_LATITUDE_E7240_BDW
+
+config BOARD_SPECIFIC_OPTIONS
+ def_bool y
+ select BOARD_ROMSIZE_KB_8192
+ select EC_DELL_MEC5055
+ select HAVE_ACPI_RESUME
+ select HAVE_ACPI_TABLES
+ select INTEL_INT15
+ select MAINBOARD_HAS_LIBGFXINIT
+ select SERIRQ_CONTINUOUS_MODE
+ select SOC_INTEL_BROADWELL
+ select SYSTEM_TYPE_LAPTOP
+
+config MAINBOARD_DIR
+ string
+ default "dell/latitude_e7240_bdw"
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "Latitude E7240"
+
+config VGA_BIOS_FILE
+ string
+ default "pci8086,0a16.rom"
+
+config VGA_BIOS_ID
+ string
+ default "8086,0a16"
+
+config MAX_CPUS
+ int
+ default 4
+
+endif
diff --git a/src/mainboard/dell/latitude_e7240_bdw/Kconfig.name b/src/mainboard/dell/latitude_e7240_bdw/Kconfig.name
new file mode 100644
index 0000000000..222439836a
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/Kconfig.name
@@ -0,0 +1,2 @@
+config BOARD_DELL_LATITUDE_E7240_BDW
+ bool "Latitude E7240 (Broadwell)"
diff --git a/src/mainboard/dell/latitude_e7240_bdw/Makefile.inc b/src/mainboard/dell/latitude_e7240_bdw/Makefile.inc
new file mode 100644
index 0000000000..5fbd701e53
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/Makefile.inc
@@ -0,0 +1,5 @@
+bootblock-y += bootblock.c
+romstage-y += gpio.c
+romstage-y += pei_data.c
+ramstage-y += pei_data.c
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
diff --git a/src/mainboard/dell/latitude_e7240_bdw/acpi/ec.asl b/src/mainboard/dell/latitude_e7240_bdw/acpi/ec.asl
new file mode 100644
index 0000000000..24915c22ef
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/acpi/ec.asl
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* FIXME: not working yet */
+Device(EC)
+{
+ Name (_HID, EISAID("PNP0C09"))
+ Name (_UID, 0)
+ Name (_GPE, 39)
+
+ Method (_Q66, 0, NotSerialized)
+ {
+ Store ("EC: _Q66", Debug)
+ }
+}
diff --git a/src/mainboard/dell/latitude_e7240_bdw/acpi/platform.asl b/src/mainboard/dell/latitude_e7240_bdw/acpi/platform.asl
new file mode 100644
index 0000000000..2d24bbd9b9
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/acpi/platform.asl
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+Method(_WAK, 1)
+{
+ /* FIXME: EC support */
+ Return(Package() {0, 0})
+}
+
+Method(_PTS,1)
+{
+ /* FIXME: EC support */
+}
diff --git a/src/mainboard/dell/latitude_e7240_bdw/acpi/superio.asl b/src/mainboard/dell/latitude_e7240_bdw/acpi/superio.asl
new file mode 100644
index 0000000000..55b1db5b11
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <drivers/pc80/pc/ps2_controller.asl>
diff --git a/src/mainboard/dell/latitude_e7240_bdw/acpi_tables.c b/src/mainboard/dell/latitude_e7240_bdw/acpi_tables.c
new file mode 100644
index 0000000000..d55aa3a7d4
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/acpi_tables.c
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <acpi/acpi_gnvs.h>
+#include <soc/acpi.h>
+#include <soc/nvs.h>
+
+/* FIXME: check this function. */
+void acpi_create_gnvs(struct global_nvs *gnvs)
+{
+}
diff --git a/src/mainboard/dell/latitude_e7240_bdw/board_info.txt b/src/mainboard/dell/latitude_e7240_bdw/board_info.txt
new file mode 100644
index 0000000000..46e950abbd
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/board_info.txt
@@ -0,0 +1,7 @@
+Category: laptop
+Board URL: https://www.dell.com/support/home/en-us/product-support/product/latitude-e7240-ultrabook/docs
+ROM protocol: SPI
+ROM package: SOIC-8
+ROM socketed: n
+Flashrom support: n
+Release year: 2013
diff --git a/src/mainboard/dell/latitude_e7240_bdw/bootblock.c b/src/mainboard/dell/latitude_e7240_bdw/bootblock.c
new file mode 100644
index 0000000000..62f7fc2aa0
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/bootblock.c
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/pci_ops.h>
+#include <ec/dell/mec5055/mec5055.h>
+#include <southbridge/intel/lynxpoint/pch.h>
+
+void mainboard_config_superio(void)
+{
+ /* port 0x910 and 0x911 is needed to initialize the EC */
+ pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0x007c0901);
+ mec5055_early_init();
+ pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0x005c0921);
+}
diff --git a/src/mainboard/dell/latitude_e7240_bdw/devicetree.cb b/src/mainboard/dell/latitude_e7240_bdw/devicetree.cb
new file mode 100644
index 0000000000..9028d3c0dc
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/devicetree.cb
@@ -0,0 +1,63 @@
+chip soc/intel/broadwell
+ register "gfx" = "GMA_STATIC_DISPLAYS(0)"
+ register "gpu_dp_b_hotplug" = "4"
+ register "gpu_dp_c_hotplug" = "4"
+ register "gpu_dp_d_hotplug" = "4"
+ register "gpu_panel_power_backlight_off_delay" = "1"
+ register "gpu_panel_power_backlight_on_delay" = "1"
+ register "gpu_panel_power_cycle_delay" = "6"
+ register "gpu_panel_power_down_delay" = "500"
+ register "gpu_panel_power_up_delay" = "2000"
+ register "gpu_pch_backlight_pwm_hz" = "200"
+ device cpu_cluster 0x0 on
+ device lapic 0x0 on end
+ end
+ device domain 0x0 on
+ subsystemid 0x1028 0x05ca inherit
+
+ device pci 00.0 on end # Host bridge
+ device pci 02.0 on end # Internal graphics VGA controller
+ device pci 03.0 on end # Mini-HD audio
+
+ chip soc/intel/broadwell/pch
+ register "gen1_dec" = "0x007c0681"
+ register "gen2_dec" = "0x005c0921"
+ register "gen3_dec" = "0x003c07e1"
+
+ register "alt_gp_smi_en" = "0x00002000"
+ register "gpe0_en_1" = "0x00000100"
+ register "gpe0_en_2" = "0x00000080"
+ register "gpe0_en_4" = "0x00000042"
+
+ # 0(eSATA on dock), 1(mSATA near the fan), 3(mSATA near WLAN)
+ register "sata_port_map" = "0x0b"
+
+ device pci 14.0 on end # xHCI Controller
+ device pci 15.0 off end # Serial I/O DMA
+ device pci 15.1 off end # I2C0
+ device pci 15.2 off end # I2C1
+ device pci 15.3 off end # GSPI0
+ device pci 15.4 off end # GSPI1
+ device pci 15.5 off end # UART0
+ device pci 15.6 off end # UART1
+ device pci 16.0 on end # Management Engine Interface 1
+ device pci 16.1 off end # Management Engine Interface 2
+ device pci 16.2 off end # Management Engine IDE-R
+ device pci 16.3 off end # Management Engine KT
+ device pci 17.0 off end # SDIO
+ device pci 19.0 on end # Intel Gigabit Ethernet
+ device pci 1b.0 on end # High Definition Audio
+ device pci 1c.0 on end # PCIe Port #1
+ device pci 1c.1 off end # PCIe Port #2
+ device pci 1c.2 off end # PCIe Port #3
+ device pci 1c.3 on end # PCIe Port #4, WLAN
+ device pci 1c.4 on end # PCIe Port #5, SD/MMC Card Reader
+ device pci 1c.5 off end # PCIe Port #6
+ device pci 1d.0 on end # USB2 EHCI #1
+ device pci 1f.0 on end # LPC bridge
+ device pci 1f.2 on end # SATA Controller (AHCI)
+ device pci 1f.3 on end # SMBus
+ device pci 1f.6 off end # Thermal
+ end
+ end
+end
diff --git a/src/mainboard/dell/latitude_e7240_bdw/dsdt.asl b/src/mainboard/dell/latitude_e7240_bdw/dsdt.asl
new file mode 100644
index 0000000000..90ffd29681
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/dsdt.asl
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+
+DefinitionBlock(
+ "dsdt.aml",
+ "DSDT",
+ ACPI_DSDT_REV_2,
+ OEM_ID,
+ ACPI_TABLE_CREATOR,
+ 0x20141018 /* OEM revision */
+)
+{
+ #include <soc/intel/broadwell/acpi/platform.asl>
+ #include <soc/intel/broadwell/pch/acpi/globalnvs.asl>
+ #include <cpu/intel/common/acpi/cpu.asl>
+ #include <southbridge/intel/common/acpi/sleepstates.asl>
+
+ Device (\_SB.PCI0)
+ {
+ #include <soc/intel/broadwell/acpi/hostbridge.asl>
+ #include <soc/intel/broadwell/pch/acpi/pch.asl>
+ }
+}
diff --git a/src/mainboard/dell/latitude_e7240_bdw/gma-mainboard.ads b/src/mainboard/dell/latitude_e7240_bdw/gma-mainboard.ads
new file mode 100644
index 0000000000..cdc7f18680
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/gma-mainboard.ads
@@ -0,0 +1,17 @@
+-- SPDX-License-Identifier: GPL-2.0-or-later
+
+with HW.GFX.GMA;
+with HW.GFX.GMA.Display_Probing;
+
+use HW.GFX.GMA;
+use HW.GFX.GMA.Display_Probing;
+
+private package GMA.Mainboard is
+
+ ports : constant Port_List :=
+ (DP2,
+ HDMI1,
+ eDP,
+ others => Disabled);
+
+end GMA.Mainboard;
diff --git a/src/mainboard/dell/latitude_e7240_bdw/gpio.c b/src/mainboard/dell/latitude_e7240_bdw/gpio.c
new file mode 100644
index 0000000000..4d3f4746d9
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/gpio.c
@@ -0,0 +1,110 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/gpio.h>
+
+const struct gpio_config mainboard_gpio_config[] = {
+ [0] = PCH_GPIO_OUT_LOW,
+ [1] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL },
+ [2] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [3] = PCH_GPIO_OUT_LOW,
+ [4] = PCH_GPIO_NATIVE,
+ [5] = PCH_GPIO_NATIVE,
+ [6] = PCH_GPIO_NATIVE,
+ [7] = PCH_GPIO_NATIVE,
+ [8] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [9] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [10] = PCH_GPIO_OUT_LOW,
+ [11] = PCH_GPIO_NATIVE,
+ [12] = PCH_GPIO_NATIVE,
+ [13] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [14] = PCH_GPIO_OUT_LOW,
+ [15] = PCH_GPIO_OUT_LOW,
+ [16] = PCH_GPIO_OUT_HIGH,
+ [17] = PCH_GPIO_OUT_LOW,
+ [18] = PCH_GPIO_NATIVE,
+ [19] = PCH_GPIO_NATIVE,
+ [20] = PCH_GPIO_NATIVE,
+ [21] = PCH_GPIO_NATIVE,
+ [22] = PCH_GPIO_NATIVE,
+ [23] = PCH_GPIO_NATIVE,
+ [24] = PCH_GPIO_OUT_LOW,
+ [25] = PCH_GPIO_OUT_LOW,
+ [26] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT },
+ [27] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [28] = PCH_GPIO_OUT_LOW,
+ [29] = PCH_GPIO_NATIVE,
+ [30] = PCH_GPIO_NATIVE,
+ [31] = PCH_GPIO_NATIVE,
+ [32] = PCH_GPIO_NATIVE,
+ [33] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [34] = PCH_GPIO_OUT_HIGH,
+ [35] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [36] = PCH_GPIO_OUT_LOW,
+ [37] = PCH_GPIO_NATIVE,
+ [38] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [39] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [40] = PCH_GPIO_NATIVE,
+ [41] = PCH_GPIO_NATIVE,
+ [42] = PCH_GPIO_NATIVE,
+ [43] = PCH_GPIO_NATIVE,
+ [44] = PCH_GPIO_OUT_LOW,
+ [45] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL,
+ .route = GPIO_ROUTE_SMI,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [46] = PCH_GPIO_OUT_LOW,
+ [47] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [48] = PCH_GPIO_OUT_LOW,
+ [49] = PCH_GPIO_OUT_LOW,
+ [50] = PCH_GPIO_OUT_HIGH,
+ [51] = PCH_GPIO_OUT_LOW,
+ [52] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [53] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT, .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [54] = PCH_GPIO_OUT_LOW,
+ [55] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT,
+ .pirq = GPIO_PIRQ_APIC_ROUTE },
+ [56] = PCH_GPIO_OUT_HIGH,
+ [57] = PCH_GPIO_OUT_HIGH,
+ [58] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT },
+ [59] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [60] = PCH_GPIO_OUT_LOW,
+ [61] = PCH_GPIO_NATIVE,
+ [62] = PCH_GPIO_NATIVE,
+ [63] = PCH_GPIO_NATIVE,
+ [64] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [65] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [66] = PCH_GPIO_OUT_LOW,
+ [67] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL },
+ [68] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL },
+ [69] = PCH_GPIO_OUT_HIGH,
+ [70] = PCH_GPIO_OUT_LOW,
+ [71] = PCH_GPIO_NATIVE,
+ [72] = PCH_GPIO_NATIVE,
+ [73] = PCH_GPIO_OUT_LOW,
+ [74] = PCH_GPIO_NATIVE,
+ [75] = PCH_GPIO_NATIVE,
+ [76] = PCH_GPIO_OUT_HIGH,
+ [77] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [78] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL },
+ [79] = PCH_GPIO_OUT_LOW,
+ [80] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL },
+ [81] = PCH_GPIO_NATIVE,
+ [82] = PCH_GPIO_NATIVE,
+ [83] = PCH_GPIO_OUT_HIGH,
+ [84] = PCH_GPIO_OUT_HIGH,
+ [85] = PCH_GPIO_OUT_HIGH,
+ [86] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL },
+ [87] = PCH_GPIO_OUT_LOW,
+ [88] = PCH_GPIO_OUT_LOW,
+ [89] = PCH_GPIO_OUT_HIGH,
+ [90] = PCH_GPIO_OUT_HIGH,
+ [91] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [92] = { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT | GPIO_IRQ_LEVEL },
+ [93] = PCH_GPIO_OUT_LOW,
+ [94] = PCH_GPIO_OUT_LOW,
+ PCH_GPIO_END
+};
diff --git a/src/mainboard/dell/latitude_e7240_bdw/hda_verb.c b/src/mainboard/dell/latitude_e7240_bdw/hda_verb.c
new file mode 100644
index 0000000000..7fd135a611
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/hda_verb.c
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+ 0x10ec0292, /* Codec Vendor / Device ID: Realtek */
+ 0x102805ca, /* Subsystem ID */
+ 12, /* Number of 4 dword sets */
+ AZALIA_SUBVENDOR(0, 0x102805ca),
+ AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
+ AZALIA_PIN_CFG(0, 0x13, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x14, 0x90170110),
+ AZALIA_PIN_CFG(0, 0x15, 0x0221401f),
+ AZALIA_PIN_CFG(0, 0x16, 0x01014020),
+ AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x19, 0x01a19030),
+ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1d, 0x40700001),
+ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+};
+
+const u32 pc_beep_verbs[0] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/dell/latitude_e7240_bdw/mainboard.c b/src/mainboard/dell/latitude_e7240_bdw/mainboard.c
new file mode 100644
index 0000000000..98cc8110cc
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/mainboard.c
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/device.h>
+#include <drivers/intel/gma/int15.h>
+
+static void mainboard_enable(struct device *dev)
+{
+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_DEFAULT,
+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
+}
+
+struct chip_operations mainboard_ops = {
+ .enable_dev = mainboard_enable,
+};
diff --git a/src/mainboard/dell/latitude_e7240_bdw/pei_data.c b/src/mainboard/dell/latitude_e7240_bdw/pei_data.c
new file mode 100644
index 0000000000..a8fca1ec6d
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/pei_data.c
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/pei_data.h>
+#include <soc/pei_wrapper.h>
+
+void mainboard_fill_pei_data(struct pei_data *pei_data)
+{
+ pei_data->ec_present = 1;
+
+ pei_data->dimm_channel0_disabled = 2;
+ pei_data->dimm_channel1_disabled = 2;
+ pei_data->spd_addresses[0] = 0xa0;
+ pei_data->spd_addresses[2] = 0xa4;
+
+ pei_data_usb2_port(pei_data, 0, 0x0040, 1, 0, USB_PORT_BACK_PANEL); /* dock left */
+ pei_data_usb2_port(pei_data, 1, 0x0040, 1, 1, USB_PORT_BACK_PANEL); /* right, EHCI debug */
+ pei_data_usb2_port(pei_data, 2, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_DOCK);
+ pei_data_usb2_port(pei_data, 3, 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL); /* webcam */
+ pei_data_usb2_port(pei_data, 4, 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL);
+ pei_data_usb2_port(pei_data, 5, 0x0110, 1, 2, USB_PORT_BACK_PANEL); /* back right, dock back */
+ pei_data_usb2_port(pei_data, 6, 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_DOCK); /* WWAN */
+ pei_data_usb2_port(pei_data, 7, 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL);
+
+ pei_data_usb3_port(pei_data, 0, 1, 1, 0);
+ pei_data_usb3_port(pei_data, 1, 1, 0, 0);
+ pei_data_usb3_port(pei_data, 2, 1, 2, 0);
+ pei_data_usb3_port(pei_data, 3, 1, USB_OC_PIN_SKIP, 0);
+}
diff --git a/src/mainboard/dell/latitude_e7240_bdw/romstage.c b/src/mainboard/dell/latitude_e7240_bdw/romstage.c
new file mode 100644
index 0000000000..8fc2f9eaf7
--- /dev/null
+++ b/src/mainboard/dell/latitude_e7240_bdw/romstage.c
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/pei_data.h>
+#include <soc/pei_wrapper.h>
+#include <soc/romstage.h>
+
+void mainboard_pre_raminit(struct romstage_params *rp)
+{
+ /* Fill out PEI DATA */
+ mainboard_fill_pei_data(&rp->pei_data);
+}
+
+void mainboard_post_raminit(struct romstage_params *rp)
+{
+}