diff options
author | Greg Watson <jarrah@users.sourceforge.net> | 2003-11-15 15:04:58 +0000 |
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committer | Greg Watson <jarrah@users.sourceforge.net> | 2003-11-15 15:04:58 +0000 |
commit | 78c19a11ebe9843aaee9c328205794b4c643a460 (patch) | |
tree | 2958b99f80af98bde4d0b9be40b18e070a272dcf | |
parent | d4718ff415b0e0c6f32412a609b507d98f82b850 (diff) | |
download | coreboot-78c19a11ebe9843aaee9c328205794b4c643a460.tar.xz |
setup for v2
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1278 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | targets/motorola/sandpoint/Config.lb | 47 |
1 files changed, 17 insertions, 30 deletions
diff --git a/targets/motorola/sandpoint/Config.lb b/targets/motorola/sandpoint/Config.lb index b725ab40de..4163fe3c0a 100644 --- a/targets/motorola/sandpoint/Config.lb +++ b/targets/motorola/sandpoint/Config.lb @@ -19,17 +19,18 @@ uses UART0_IO_BASE uses CONFIG_IDE_STREAM uses IDE_BOOT_DRIVE uses IDE_SWAB IDE_OFFSET -uses ROM_SIZE ROM_IMAGE_SIZE -uses ROM_SECTION_SIZE -uses ROM_SECTION_OFFSET +uses ROM_SIZE uses _RESET uses _EXCEPTION_VECTORS uses _ROMBASE +uses _ROMSTART uses _RAMBASE -uses STACK_SIZE HEAP_SIZE +uses _RAMSTART +uses STACK_SIZE +uses HEAP_SIZE ## use a cross compiler -option CROSS_COMPILE="powerpc-eabi-" +#option CROSS_COMPILE="powerpc-eabi-" #option CROSS_COMPILE="ppc_74xx-" ## Use stage 1 initialization code @@ -44,8 +45,8 @@ option NO_POST=1 ## Enable serial console option DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 -option TTYS0_BASE=0x3f0 -option UART0_IO_BASE=0xfe000000+TTYS0_BASE +option UART0_IO_BASE=0x3f0 +option TTYS0_BASE=0xfe000000+UART0_IO_BASE ## Boot linux from IDE option CONFIG_IDE_STREAM=1 @@ -53,46 +54,32 @@ option IDE_BOOT_DRIVE=0 option IDE_SWAB=1 option IDE_OFFSET=0 +# ROM is 1Mb option ROM_SIZE=1048576 -## For the trick of using cache as ram -## put the fake ram location at this address -#option CACHE_RAM_BASE=0x00200000 -#option CACHE_RAM_SIZE=0x00004000 - -## -## Use a 64K stack -## +# Set stack and heap sizes (stage 2) option STACK_SIZE=0x10000 - -## -## Use a 64K heap -## option HEAP_SIZE=0x10000 -## Compute the location and size of where this firmware image -## (linuxBIOS plus bootloader) will live in the boot rom chip. -## -option ROM_SECTION_SIZE=ROM_SIZE -option ROM_SECTION_OFFSET=0 - # Sandpoint Demo Board romimage "normal" + ## Base of ROM + option _ROMBASE=0xfff00000 + ## Sandpoint reset vector - option _RESET=0xfff00100 + option _RESET=_ROMBASE+0x100 - ## Excpetoion vectors + ## Exception vectors (other than reset vector) option _EXCEPTION_VECTORS=_RESET+0x100 ## Start of linuxBIOS in the boot rom ## = _RESET + exeception vector table size - option _ROMBASE=0xfff03100 + option _ROMSTART=_RESET+0x3100 ## LinuxBIOS C code runs at this location in RAM option _RAMBASE=0x00100000 + option _RAMSTART=0x00100000 - ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. - option ROM_IMAGE_SIZE=49152 option CONFIG_SANDPOINT_ALTIMUS=1 mainboard motorola/sandpoint |