summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAlexander Couzens <lynxis@fe80.eu>2018-08-17 18:47:52 +0200
committerFelix Held <felix-coreboot@felixheld.de>2018-09-14 13:50:34 +0000
commit86b8d176e8b2d62c1d4a713f91b5858b5d39dd84 (patch)
tree1f8184f21b85c636a64e8c8825524c26189e61da
parentdf5e6f64b6dd465cb6253159dc3c7335e763dbde (diff)
downloadcoreboot-86b8d176e8b2d62c1d4a713f91b5858b5d39dd84.tar.xz
ec/lenovo/pmh7: support 9bit address space
The pmh7 has at least a 9bit address space. The h8s allows to access the 9th address space by using io port 0x15ed as second address register. The pmh7 is connected via SPI to the h8s. The h8s is acting as proxy to access the address space. Change-Id: I0d7ce00950862adf928a88d70afbc33df8b87d9a Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: https://review.coreboot.org/28196 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Evgeny Zinoviev <me@ch1p.com>
-rw-r--r--src/ec/lenovo/pmh7/pmh7.c6
-rw-r--r--src/ec/lenovo/pmh7/pmh7.h3
2 files changed, 6 insertions, 3 deletions
diff --git a/src/ec/lenovo/pmh7/pmh7.c b/src/ec/lenovo/pmh7/pmh7.c
index f7b798be33..986abb5d81 100644
--- a/src/ec/lenovo/pmh7/pmh7.c
+++ b/src/ec/lenovo/pmh7/pmh7.c
@@ -103,13 +103,15 @@ void pmh7_register_clear_bit(int reg, int bit)
char pmh7_register_read(int reg)
{
- outb(reg, EC_LENOVO_PMH7_ADDR);
+ outb(reg & 0xff, EC_LENOVO_PMH7_ADDR_L);
+ outb((reg & 0xff00) >> 8, EC_LENOVO_PMH7_ADDR_H);
return inb(EC_LENOVO_PMH7_DATA);
}
void pmh7_register_write(int reg, int val)
{
- outb(reg, EC_LENOVO_PMH7_ADDR);
+ outb(reg & 0xff, EC_LENOVO_PMH7_ADDR_L);
+ outb((reg & 0xff00) >> 8, EC_LENOVO_PMH7_ADDR_H);
outb(val, EC_LENOVO_PMH7_DATA);
}
diff --git a/src/ec/lenovo/pmh7/pmh7.h b/src/ec/lenovo/pmh7/pmh7.h
index a641fce0fa..313a560937 100644
--- a/src/ec/lenovo/pmh7/pmh7.h
+++ b/src/ec/lenovo/pmh7/pmh7.h
@@ -19,7 +19,8 @@
#define EC_LENOVO_PMH7_INDEX 0x77
#define EC_LENOVO_PMH7_BASE 0x15e0
-#define EC_LENOVO_PMH7_ADDR (EC_LENOVO_PMH7_BASE + 0x0c)
+#define EC_LENOVO_PMH7_ADDR_L (EC_LENOVO_PMH7_BASE + 0x0c)
+#define EC_LENOVO_PMH7_ADDR_H (EC_LENOVO_PMH7_BASE + 0x0d)
#define EC_LENOVO_PMH7_DATA (EC_LENOVO_PMH7_BASE + 0x0e)
#define EC_LENOVO_PMH7_REG_ID 0xc2