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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-10-10 20:20:09 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-10-21 19:42:55 +0200 |
| commit | 874fe1d328b31bca725e6788d3cb54687472206a (patch) | |
| tree | cde6f4a9dee93c98cecc636a6055a915e28781f6 | |
| parent | a51d2db4f03844cae1d3e0eb72e305fcb0c9c8d3 (diff) | |
| download | coreboot-874fe1d328b31bca725e6788d3cb54687472206a.tar.xz | |
mainboard/amd/bettong: Use C89 comments style & remove commented code
Change-Id: I137b27ffb0e54a9ca6b0bd3a454b1d99b3e1c22b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16907
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
| -rw-r--r-- | src/mainboard/amd/bettong/BiosCallOuts.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/bettong/OemCustomize.c | 4 | ||||
| -rw-r--r-- | src/mainboard/amd/bettong/mptable.c | 1 |
3 files changed, 3 insertions, 4 deletions
diff --git a/src/mainboard/amd/bettong/BiosCallOuts.c b/src/mainboard/amd/bettong/BiosCallOuts.c index d4d44106db..a2eeec7993 100644 --- a/src/mainboard/amd/bettong/BiosCallOuts.c +++ b/src/mainboard/amd/bettong/BiosCallOuts.c @@ -72,7 +72,7 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) if (StdHeader->Func == AMD_INIT_RESET) { FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData; printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); - //FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */ + FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); FchParams_reset->FchReset.Xhci1Enable = FALSE; FchParams_reset->EarlyOemGpioTable = oem_bettong_gpio; diff --git a/src/mainboard/amd/bettong/OemCustomize.c b/src/mainboard/amd/bettong/OemCustomize.c index 330024467a..a32ea9a424 100644 --- a/src/mainboard/amd/bettong/OemCustomize.c +++ b/src/mainboard/amd/bettong/OemCustomize.c @@ -71,7 +71,7 @@ static const PCIe_PORT_DESCRIPTOR PortList [] = { }, /* Initialize Port descriptor (PCIe port, Lanes 0-3, PCI Device Number 2, ...) */ { - DESCRIPTOR_TERMINATE_LIST, // Descriptor flags !!!IMPORTANT!!! Terminate last element of array + DESCRIPTOR_TERMINATE_LIST, /* Descriptor flags !!!IMPORTANT!!! Terminate last element of array */ PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 0, 3), PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 1, HotplugDisabled, @@ -91,7 +91,7 @@ static const PCIe_DDI_DESCRIPTOR DdiList [] = { }, /* DP1 */ { - 0, //DESCRIPTOR_TERMINATE_LIST, + 0, /*DESCRIPTOR_TERMINATE_LIST, */ PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 20, 23), PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux2, Hdp2) }, diff --git a/src/mainboard/amd/bettong/mptable.c b/src/mainboard/amd/bettong/mptable.c index 744fd985e3..9e73e7798a 100644 --- a/src/mainboard/amd/bettong/mptable.c +++ b/src/mainboard/amd/bettong/mptable.c @@ -64,7 +64,6 @@ static void *smp_write_config_table(void *v) smp_write_processors(mc); - //mptable_write_buses(mc, NULL, &bus_isa); my_smp_write_bus(mc, 0, "PCI "); my_smp_write_bus(mc, 1, "PCI "); bus_isa = 0x02; |