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authorJohanna Schander <coreboot@mimoja.de>2019-12-08 15:54:09 +0100
committerNico Huber <nico.h@gmx.de>2020-03-30 10:53:51 +0000
commit8a6e036861c87deadc6455f89062c56639acbdc7 (patch)
tree6a002f54f20d79107298a581c22216a20f3f3a7d
parente5565c45cb71df105bc9ff1dc7572b4e749adaea (diff)
downloadcoreboot-8a6e036861c87deadc6455f89062c56639acbdc7.tar.xz
intel/fsp2_0: Make FSP_USE_REPO a SoC opt-in
For quite a bit now we are extending the FSP_USE_REPO option to be available for all Intel SoCs. This results in a list being not only hard to maintain but also prone to errors. To change that behaviour this commit introduces the HAVE_INTEL_FSP_REPO config option for SoCs that are supported from within 3rdparty/fsp. If a SoC selects HAVE_INTEL_FSP_REPO the config option FSP_USE_REPO is selected by default, but can be still deselected by the user in menuconfig. Change-Id: I68ae373ce591f06073064aa75aac32ceca8fa1cc Signed-off-by: Johanna Schander <coreboot@mimoja.de> Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37582 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/drivers/intel/fsp2_0/Kconfig6
-rw-r--r--src/soc/intel/Kconfig6
-rw-r--r--src/soc/intel/apollolake/Kconfig1
-rw-r--r--src/soc/intel/cannonlake/Kconfig3
-rw-r--r--src/soc/intel/denverton_ns/Kconfig1
-rw-r--r--src/soc/intel/icelake/Kconfig1
-rw-r--r--src/soc/intel/skylake/Kconfig1
7 files changed, 15 insertions, 4 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index cf79201db6..1e1cc194d8 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -53,10 +53,8 @@ config FSP_M_CBFS
config FSP_USE_REPO
bool "Use the IntelFSP based binaries"
depends on ADD_FSP_BINARIES
- depends on SOC_INTEL_APOLLOLAKE || SOC_INTEL_SKYLAKE || \
- SOC_INTEL_KABYLAKE || SOC_INTEL_COFFEELAKE || \
- SOC_INTEL_ICELAKE || SOC_INTEL_WHISKEYLAKE || \
- SOC_INTEL_DENVERTON_NS || SOC_INTEL_COMETLAKE
+ depends on HAVE_INTEL_FSP_REPO
+ default y
help
When selecting this option, the SoC must set FSP_HEADER_PATH
and FSP_FD_PATH correctly so FSP splitting works.
diff --git a/src/soc/intel/Kconfig b/src/soc/intel/Kconfig
index d5190683ae..75f2f7090e 100644
--- a/src/soc/intel/Kconfig
+++ b/src/soc/intel/Kconfig
@@ -38,3 +38,9 @@ config INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG
than the one in non-topswap bootblock. This string will be passed
onto ifittool (-A -n option). ifittool will not parse the region for MCU
entries, and only locate the region and insert its address into FIT.
+
+config HAVE_INTEL_FSP_REPO
+ bool
+ help
+ Select this, if the FSP binaries for the platform are public available
+ in 3rdparty/fsp.
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 2bc49c838f..ed35eaac7e 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -44,6 +44,7 @@ config CPU_SPECIFIC_OPTIONS
select GENERIC_GPIO_LIB
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
+ select HAVE_INTEL_FSP_REPO
select MRC_SETTINGS_PROTECT
select MRC_SETTINGS_VARIABLE_DATA
select NO_XIP_EARLY_STAGES
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 1495e2e1bb..baf8756385 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -24,6 +24,7 @@ config SOC_INTEL_COFFEELAKE
bool
select SOC_INTEL_CANNONLAKE_BASE
select FSP_USES_CB_STACK
+ select HAVE_INTEL_FSP_REPO
help
Intel Coffeelake support
@@ -31,6 +32,7 @@ config SOC_INTEL_WHISKEYLAKE
bool
select SOC_INTEL_CANNONLAKE_BASE
select FSP_USES_CB_STACK
+ select HAVE_INTEL_FSP_REPO
help
Intel Whiskeylake support
@@ -39,6 +41,7 @@ config SOC_INTEL_COMETLAKE
select SOC_INTEL_CANNONLAKE_BASE
select MICROCODE_BLOB_UNDISCLOSED
select FSP_USES_CB_STACK
+ select HAVE_INTEL_FSP_REPO
help
Intel Cometlake support
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 6ca7f3e61f..c628dbd7b5 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -32,6 +32,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_RESET
select PLATFORM_USES_FSP2_0
select IOAPIC
+ select HAVE_INTEL_FSP_REPO
select HAVE_SMI_HANDLER
select CACHE_MRC_SETTINGS
select PARALLEL_MP
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 9e97d2ca2c..559ba6c801 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -20,6 +20,7 @@ config CPU_SPECIFIC_OPTIONS
select FSP_M_XIP
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
+ select HAVE_INTEL_FSP_REPO
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
select IDT_IN_EVERY_STAGE
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 4493f9ba9a..2beda43c7c 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -39,6 +39,7 @@ config CPU_SPECIFIC_OPTIONS
select INTEL_CAR_NEM_ENHANCED
select INTEL_GMA_ACPI
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
+ select HAVE_INTEL_FSP_REPO
select IOAPIC
select MRC_SETTINGS_PROTECT
select PARALLEL_MP