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authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-07-06 11:41:09 +0300
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 23:25:53 +0200
commit8ee04d784cbaeb8a30276ac22aa99ddda44092b7 (patch)
tree209414bf6d307b8bb9cbe8816447ee4a79e81c06
parent41c10cd2d73198e61573af1341d5826654f1133a (diff)
downloadcoreboot-8ee04d784cbaeb8a30276ac22aa99ddda44092b7.tar.xz
usbdebug: Put ehci_debug_info in CAR_GLOBAL
Store EHCI Debug Port runtime variables in CAR_GLOBAL. For platforms without CAR_MIGRATION, logging on EHCI Debug Port is temporarily lost when CAR is torn down at end of romstage. On model_2065x and model_206ax ehci_debug_info was overlapping the MRC variable region and additionally migration used incorrect size for the structure. Change-Id: I5e6c613b8a4b1dda43d5b69bd437753108760fca Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3475 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--src/cpu/intel/car/cache_as_ram_ht.inc5
-rw-r--r--src/cpu/intel/haswell/cache_as_ram.inc9
-rw-r--r--src/cpu/intel/model_2065x/cache_as_ram.inc9
-rw-r--r--src/cpu/intel/model_206ax/cache_as_ram.inc9
-rw-r--r--src/cpu/intel/model_6ex/cache_as_ram.inc5
-rw-r--r--src/lib/usbdebug.c18
6 files changed, 7 insertions, 48 deletions
diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc
index 8a845e954a..fe1e29a5b3 100644
--- a/src/cpu/intel/car/cache_as_ram_ht.inc
+++ b/src/cpu/intel/car/cache_as_ram_ht.inc
@@ -334,12 +334,7 @@ no_msr_11e:
post_code(0x2e)
/* Set up the stack pointer. */
-#if CONFIG_USBDEBUG
- /* Leave some space for the struct ehci_debug_info. */
- movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %esp
-#else
movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %esp
-#endif
/* Restore the BIST result. */
movl %ebp, %eax
diff --git a/src/cpu/intel/haswell/cache_as_ram.inc b/src/cpu/intel/haswell/cache_as_ram.inc
index 8601f46a9b..2d1e86fc09 100644
--- a/src/cpu/intel/haswell/cache_as_ram.inc
+++ b/src/cpu/intel/haswell/cache_as_ram.inc
@@ -190,15 +190,6 @@ before_romstage:
post_code(0x2f)
- /* Copy global variable space (for USBDEBUG) to memory */
-#if CONFIG_USBDEBUG
- cld
- movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - 24), %esi
- movl $(CONFIG_RAMTOP - 24), %edi
- movl $24, %ecx
- rep movsb
-#endif
-
post_code(0x30)
/* Disable cache. */
diff --git a/src/cpu/intel/model_2065x/cache_as_ram.inc b/src/cpu/intel/model_2065x/cache_as_ram.inc
index db0eaaebbe..ec7335e50a 100644
--- a/src/cpu/intel/model_2065x/cache_as_ram.inc
+++ b/src/cpu/intel/model_2065x/cache_as_ram.inc
@@ -182,15 +182,6 @@ before_romstage:
post_code(0x2f)
- /* Copy global variable space (for USBDEBUG) to memory */
-#if CONFIG_USBDEBUG
- cld
- movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - 24), %esi
- movl $(CONFIG_RAMTOP - 24), %edi
- movl $24, %ecx
- rep movsb
-#endif
-
post_code(0x30)
/* Disable cache. */
diff --git a/src/cpu/intel/model_206ax/cache_as_ram.inc b/src/cpu/intel/model_206ax/cache_as_ram.inc
index 2652cb7433..b4119cc0b9 100644
--- a/src/cpu/intel/model_206ax/cache_as_ram.inc
+++ b/src/cpu/intel/model_206ax/cache_as_ram.inc
@@ -182,15 +182,6 @@ before_romstage:
post_code(0x2f)
- /* Copy global variable space (for USBDEBUG) to memory */
-#if CONFIG_USBDEBUG
- cld
- movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - 24), %esi
- movl $(CONFIG_RAMTOP - 24), %edi
- movl $24, %ecx
- rep movsb
-#endif
-
post_code(0x30)
/* Disable cache. */
diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc
index 50fab35ccc..ac3c66b734 100644
--- a/src/cpu/intel/model_6ex/cache_as_ram.inc
+++ b/src/cpu/intel/model_6ex/cache_as_ram.inc
@@ -126,12 +126,7 @@ clear_mtrrs:
movl %eax, %cr0
/* Set up the stack pointer. */
-#if CONFIG_USBDEBUG
- /* Leave some space for the struct ehci_debug_info. */
- movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %eax
-#else
movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %eax
-#endif
movl %eax, %esp
/* Restore the BIST result. */
diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c
index 9cf3579991..b16e325728 100644
--- a/src/lib/usbdebug.c
+++ b/src/lib/usbdebug.c
@@ -23,6 +23,7 @@
#include <arch/io.h>
#include <device/pci.h>
#include <arch/byteorder.h>
+#include <cpu/x86/car.h>
#include <usb_ch9.h>
#include <ehci.h>
@@ -87,8 +88,8 @@
#define DBGP_MAX_PACKET 8
#define DBGP_LOOPS 1000
+static struct ehci_debug_info glob_dbg_info CAR_GLOBAL;
#if !defined(__PRE_RAM__) && !defined(__SMM__)
-static struct ehci_debug_info glob_dbg_info;
static struct device_operations *ehci_drv_ops;
static struct device_operations ehci_dbg_ops;
#endif
@@ -602,7 +603,7 @@ void usbdebug_tx_flush(struct ehci_debug_info *dbg_info)
#if !defined(__PRE_RAM__) && !defined(__SMM__)
static void usbdebug_re_enable(unsigned ehci_base)
{
- struct ehci_debug_info *dbg_info = dbgp_ehci_info();
+ struct ehci_debug_info *dbg_info = car_get_var_ptr(&glob_dbg_info);
unsigned diff;
if (!dbg_info->ehci_debug)
@@ -617,7 +618,7 @@ static void usbdebug_re_enable(unsigned ehci_base)
static void usbdebug_disable(void)
{
- struct ehci_debug_info *dbg_info = dbgp_ehci_info();
+ struct ehci_debug_info *dbg_info = car_get_var_ptr(&glob_dbg_info);
dbg_info->status &= ~DBGP_EP_ENABLED;
}
@@ -662,18 +663,13 @@ int dbgp_ep_is_active(struct ehci_debug_info *dbg_info)
struct ehci_debug_info *dbgp_ehci_info(void)
{
-#if __PRE_RAM__
- /* "Find" dbg_info structure in Cache */
- return (struct ehci_debug_info *)
- (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info));
-#else
- return &glob_dbg_info;
-#endif
+ return car_get_var_ptr(&glob_dbg_info);
}
int usbdebug_init(void)
{
- struct ehci_debug_info *dbg_info = dbgp_ehci_info();
+ struct ehci_debug_info *dbg_info = car_get_var_ptr(&glob_dbg_info);
+
#if defined(__PRE_RAM__) || !CONFIG_EARLY_CONSOLE
enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
#endif