diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2015-09-04 10:29:58 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-09-10 09:51:49 +0000 |
| commit | 963bfa7a0f36d25b22ff221ddc3f1a537bb655a2 (patch) | |
| tree | 414518e38c3cced4a75a76b1f65f55a8f029f85f | |
| parent | 88b21f31e61c2527b05623a2ebbbd150531d7657 (diff) | |
| download | coreboot-963bfa7a0f36d25b22ff221ddc3f1a537bb655a2.tar.xz | |
kunimitsu: Select EC PD and software sync and do early init
Select the EC PD and software sync kconfig options so they are
supported by the mainboard and call the EC early init function
to reboot into RO in recovery mode.
BUG=chrome-os-partner:40635
BRANCH=none
TEST=emerge-kunimitsu coreboot
Change-Id: I48316df99b796c568c2481c72588b41f7147bec0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c7507470f82848062bc98da809d3c5fe1ca31998
Original-Change-Id: I822aac9c24718f226819e5d3fcc82a4024b7c5a7
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/297751
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11575
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/mainboard/intel/kunimitsu/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/intel/kunimitsu/romstage.c | 3 |
2 files changed, 6 insertions, 1 deletions
diff --git a/src/mainboard/intel/kunimitsu/Kconfig b/src/mainboard/intel/kunimitsu/Kconfig index dd9e455925..9447f8e9da 100644 --- a/src/mainboard/intel/kunimitsu/Kconfig +++ b/src/mainboard/intel/kunimitsu/Kconfig @@ -6,9 +6,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_16384 select CACHE_ROM select EC_GOOGLE_CHROMEEC + select EC_GOOGLE_CHROMEEC_ACPI_MEMMAP select EC_GOOGLE_CHROMEEC_LPC select EC_GOOGLE_CHROMEEC_MEC - select EC_GOOGLE_CHROMEEC_ACPI_MEMMAP + select EC_GOOGLE_CHROMEEC_PD + select EC_SOFTWARE_SYNC select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE diff --git a/src/mainboard/intel/kunimitsu/romstage.c b/src/mainboard/intel/kunimitsu/romstage.c index 1491794cd9..269f29785b 100644 --- a/src/mainboard/intel/kunimitsu/romstage.c +++ b/src/mainboard/intel/kunimitsu/romstage.c @@ -42,6 +42,9 @@ static void early_config_gpio(void) void mainboard_romstage_entry(struct romstage_params *params) { + /* Ensure the EC and PD are in the right mode for recovery */ + google_chromeec_early_init(); + post_code(0x31); early_config_gpio(); |