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| author | Ivy Jian <ivy_jian@compal.corp-partner.google.com> | 2018-11-16 19:09:30 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-19 16:38:40 +0000 |
| commit | 977778f9f0f3415f9c36d16c4034d5383683d7f0 (patch) | |
| tree | 3ca83e52a3cb47ee0c3d688b635f6e25355ef888 | |
| parent | 3313a78e36da73f05da7402699f04909595a0c9d (diff) | |
| download | coreboot-977778f9f0f3415f9c36d16c4034d5383683d7f0.tar.xz | |
mb/google/kahlee/variants/delan: Enable Weida touchscreen device
This change adds ACPI properties for WDT8752A device.
BUG=b:117174180
BRANCH=master
TEST=Verify touchscreen on delan works with this change
Change-Id: Id1484a482de6282c97f3aac329f217bbcb7dbd18
Signed-off-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/29656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Daniel Kurtz <djkurtz@google.com>
| -rw-r--r-- | src/mainboard/google/kahlee/variants/delan/devicetree.cb | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/variants/delan/devicetree.cb b/src/mainboard/google/kahlee/variants/delan/devicetree.cb index fd30d5df84..b9cfe1ba7e 100644 --- a/src/mainboard/google/kahlee/variants/delan/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/delan/devicetree.cb @@ -170,5 +170,19 @@ chip soc/amd/stoneyridge register "has_power_resource" = "1" device i2c 10 on end end + chip drivers/i2c/hid + register "generic.hid" = ""WDHT0002"" + register "generic.desc" = ""WDT Touchscreen"" + register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" + register "generic.probed" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" + register "generic.reset_delay_ms" = "130" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" + register "generic.enable_delay_ms" = "2" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 2c on end + end end end #chip soc/amd/stoneyridge |