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authorElyes HAOUAS <ehaouas@noos.fr>2016-06-19 12:38:47 +0200
committerMartin Roth <martinroth@google.com>2016-06-24 18:15:09 +0200
commitaa8e7e777662e512daca0e82df243c2dcdbba4db (patch)
tree1221a3a993efc2831902529fdda42719d6a1a530
parentc8d24dd150a1922657d6ff396da8f11da24569f7 (diff)
downloadcoreboot-aa8e7e777662e512daca0e82df243c2dcdbba4db.tar.xz
SPD: fix DDR3 SDRAM memory module types
Correct the definitions for 16b and 32b SO-DIMM modules. Regarding JEDEC Standard No. 21-C Annex K: Serial Presence Detect for DDR3 SDRAM Modules (2014), the hex values used for 16b-SO-DIMM is 0x0c and for 32b-SO-DIMM module type is 0x0d Change-Id: I9210ac3409a4aaf55a0f6411d5960cfdca05068d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15262 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
-rw-r--r--src/include/device/dram/ddr3.h10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h
index eae7840fd2..7388012f86 100644
--- a/src/include/device/dram/ddr3.h
+++ b/src/include/device/dram/ddr3.h
@@ -14,6 +14,12 @@
* GNU General Public License for more details.
*/
+/*
+ * JEDEC Standard No. 21-C
+ * Annex K: Serial Presence Detect (SPD) for DDR3 SDRAM Modules 2014
+ * http://www.jedec.org/sites/default/files/docs/4_01_02_11R24.pdf
+ */
+
#ifndef DEVICE_DRAM_DDR3L_H
#define DEVICE_DRAM_DDR3L_H
@@ -82,8 +88,8 @@ enum spd_dimm_type {
SPD_DIMM_TYPE_72B_SO_RDIMM = 0x09,
SPD_DIMM_TYPE_72B_SO_CDIMM = 0x0a,
SPD_DIMM_TYPE_LRDIMM = 0x0b,
- SPD_DIMM_TYPE_16B_SO_DIMM = 0x0d,
- SPD_DIMM_TYPE_32B_SO_DIMM = 0x0e,
+ SPD_DIMM_TYPE_16B_SO_DIMM = 0x0c,
+ SPD_DIMM_TYPE_32B_SO_DIMM = 0x0d,
/* Masks to bits 3:0 to give the dimm type */
SPD_DIMM_TYPE_MASK = 0x0f,
};