diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-02-09 08:21:40 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-30 09:23:09 +0000 |
commit | ab8743c02e3e30ade3b70198c3cd8e9f33b183ec (patch) | |
tree | 8e039c02a08290b636b4869a99d967f754a66f67 | |
parent | 706aabcd4c8cad2176d42afdd47c3ecb6467bc98 (diff) | |
download | coreboot-ab8743c02e3e30ade3b70198c3cd8e9f33b183ec.tar.xz |
nb/intel/sandybridge: Get rid of device_t
Use of `device_t` has been abandoned in ramstage.
Change-Id: I585aa48b99f4ef63905cab5d6d1502bfed0e6e42
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/23668
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
-rw-r--r-- | src/northbridge/intel/sandybridge/gma.c | 8 | ||||
-rw-r--r-- | src/northbridge/intel/sandybridge/northbridge.c | 16 | ||||
-rw-r--r-- | src/northbridge/intel/sandybridge/sandybridge.h | 2 |
3 files changed, 13 insertions, 13 deletions
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index 74aabf9e66..201498aa00 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -662,7 +662,7 @@ static void gma_func0_init(struct device *dev) intel_gma_restore_opregion(); } -static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device) +static void gma_set_subsystem(struct device *dev, unsigned vendor, unsigned device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, @@ -676,7 +676,7 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device) const struct i915_gpu_controller_info * intel_gma_get_controller_info(void) { - device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0x2,0)); if (!dev) { return NULL; } @@ -684,7 +684,7 @@ intel_gma_get_controller_info(void) return &chip->gfx; } -static void gma_ssdt(device_t device) +static void gma_ssdt(struct device *device) { const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info(); if (!gfx) { @@ -729,7 +729,7 @@ static const char *gma_acpi_name(const struct device *dev) static void gma_func0_disable(struct device *dev) { u16 reg16; - device_t dev_host = dev_find_slot(0, PCI_DEVFN(0,0)); + struct device *dev_host = dev_find_slot(0, PCI_DEVFN(0,0)); reg16 = pci_read_config16(dev_host, GGC); reg16 |= (1 << 1); /* disable VGA decode */ diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 9fed17ecee..322e4b8ad7 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -62,7 +62,7 @@ static const int legacy_hole_size_k = 384; static int get_pcie_bar(u32 *base) { - device_t dev; + struct device *dev; u32 pciexbar_reg; *base = 0; @@ -120,7 +120,7 @@ static void add_fixed_resources(struct device *dev, int index) } } -static void pci_domain_set_resources(device_t dev) +static void pci_domain_set_resources(struct device *dev) { uint64_t tom, me_base, touud; uint32_t tseg_base, uma_size, tolud; @@ -273,7 +273,7 @@ static struct device_operations pci_domain_ops = { .acpi_name = northbridge_acpi_name, }; -static void mc_read_resources(device_t dev) +static void mc_read_resources(struct device *dev) { u32 pcie_config_base; int buses; @@ -287,7 +287,7 @@ static void mc_read_resources(device_t dev) } } -static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device) +static void intel_set_subsystem(struct device *dev, unsigned vendor, unsigned device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, @@ -457,7 +457,7 @@ static void northbridge_init(struct device *dev) MCHBAR32(0x5500) = 0x00100001; } -static u32 northbridge_get_base_reg(device_t dev, int reg) +static u32 northbridge_get_base_reg(struct device *dev, int reg) { u32 value; @@ -469,7 +469,7 @@ static u32 northbridge_get_base_reg(device_t dev, int reg) u32 northbridge_get_tseg_base(void) { - const device_t dev = dev_find_slot(0, PCI_DEVFN(0, 0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0, 0)); return northbridge_get_base_reg(dev, TSEG); } @@ -523,7 +523,7 @@ static const struct pci_driver mc_driver_158 __pci_driver = { .device = 0x0158, /* Ivy bridge */ }; -static void cpu_bus_init(device_t dev) +static void cpu_bus_init(struct device *dev) { initialize_cpus(dev->link_list); } @@ -536,7 +536,7 @@ static struct device_operations cpu_bus_ops = { .scan_bus = 0, }; -static void enable_dev(device_t dev) +static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_DOMAIN) { diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index 46ebfc3df0..e81d3bfc55 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -230,7 +230,7 @@ void perform_raminit(int s3resume); #include <device/device.h> struct acpi_rsdp; -unsigned long northbridge_write_acpi_tables(device_t device, unsigned long start, struct acpi_rsdp *rsdp); +unsigned long northbridge_write_acpi_tables(struct device *device, unsigned long start, struct acpi_rsdp *rsdp); #endif #endif |