diff options
| author | David Hendricks <dhendrix@google.com> | 2010-11-29 11:56:39 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-29 11:56:39 +0000 |
| commit | b97030d706987a466751eac9c29d9f26e68a9683 (patch) | |
| tree | 72e855b68403507a9b6b0863cf6451571f96c078 | |
| parent | 6fc7d2798398142af5629e50d2544b1d8f5d0fff (diff) | |
| download | coreboot-b97030d706987a466751eac9c29d9f26e68a9683.tar.xz | |
Add Fintek F71889 detection and dump support.
The patch was tested by a user on IRC who had the F71889FG. I
wrote it using documentation from Fintek's website available here:
http://www.fintek.com.tw/files/productfiles/F71889_V0.28P.pdf
This patch also seems to work for the F71889ED, which uses 0x09 and 0x09 for
chip ID bytes 1 & 2. However, I have not been able to find documentation to
verify that the two chips are identical from superiotool's perspective.
Signed-off-by: David Hendricks <dhendrix@google.com>
Signed-off-by: Alec Ari <neotheuser@ymail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | util/superiotool/fintek.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/util/superiotool/fintek.c b/util/superiotool/fintek.c index 502990635b..fc1d3f2c36 100644 --- a/util/superiotool/fintek.c +++ b/util/superiotool/fintek.c @@ -76,6 +76,55 @@ static const struct superio_registers reg_table[] = { {0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT}, {0x00,0x00,NANA,0x06,0x1c,0x01,EOT}}, {EOT}}}, + {0x2307, "F71889", { + /* We assume reserved bits are read as 0. */ + {NOLDN, NULL, + {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b, + 0x2c,0x2d,EOT}, + {0x07,0x23,0x19,0x34,0x00,0x00,0x00,0x00,0xf0,0x30, + 0x00,0x08,EOT}}, + {0x0, "Floppy", + {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT}, + {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}}, + {0x1, "COM1", + {0x30,0x60,0x61,0x70,0xf0,EOT}, + {0x01,0x03,0xf8,0x04,0x00,EOT}}, + {0x2, "COM2", + {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, + {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}}, + {0x3, "Parallel port", + {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, + {0x01,0x03,0x78,0x07,0x03,0x42,EOT}}, + {0x4, "Hardware monitor", + {0x30,0x60,0x61,0x70,EOT}, + {0x01,0x02,0x95,0x00,EOT}}, + {0x5, "Keyboard", + {0x30,0x60,0x61,0x70,0x72,0xfe,EOT}, + {0x01,0x00,0x60,0x01,0x0c,0x81,EOT}}, + {0x6, "GPIO", + {0x80,0x81,0x82,0x83,0x90,0x91,0x92,0x93,0xa0,0xa1, + 0xa2,0xa3,0xb0,0xb1,0xb2,0xc0,0xc1,0xc2,0xc3,0xd0, + 0xd1,0xd2,0xd3,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2, + 0xf3,0xfe,0xff,EOT}, + {0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0x1f, + NANA,0x00,0x00,0xff,NANA,0x00,0xff,NANA,0x00,0x00, + 0xff,NANA,0x00,0x00,0x7f,NANA,0x00,0x00,0x7f,NANA, + 0x00,0x00,0x00,EOT}}, + {0x7, "VID", + {0x30,0x60,0x61,EOT}, + {0x00,0x00,0x00,EOT}}, + {0x8, "SPI", + {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa, + 0xfb,0xfc,0xfd,0xfe,0xff,EOT}, + {0x00,RSVD,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,EOT}}, + {0xa, "PME, ACPI", + {0x30,0xf0,0xf1,0xf4,0xf5,0xf6,EOT}, + {0x00,0x00,0x00,0x26,0x1c,0x07,EOT}}, + {0xb, "VREF", + {0xf0,0xf1,0xf2,0xf3,0xff,EOT}, + {0x64,0x64,0x64,0x00,0x00,EOT}}, + {EOT}}}, {0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */ {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, |