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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-06-27 12:13:30 +1000
committerDavid Hendricks <dhendrix@chromium.org>2014-07-05 00:38:06 +0200
commitba92428514d8cac8045faa1dc573599424ef7231 (patch)
tree53b7925af5863012b81994334bb9ef904cb57625
parentbda9a821142c0a105bc8892aef610ea43ce3400c (diff)
downloadcoreboot-ba92428514d8cac8045faa1dc573599424ef7231.tar.xz
intel: Make monotonic timer a first class citizen
The monotonic time now needs to be a first class citizen in Coreboot as it is a hard dependency of the drivers/spi flash command polling function. Change-Id: I4e43d2680bf84bc525138f71c2b813b0f6be5265 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6135 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
-rw-r--r--src/cpu/intel/fsp_model_206ax/Kconfig1
-rw-r--r--src/cpu/intel/haswell/Kconfig1
-rw-r--r--src/cpu/intel/model_2065x/Kconfig1
-rw-r--r--src/cpu/intel/model_206ax/Kconfig1
-rw-r--r--src/mainboard/intel/baskingridge/Kconfig2
-rw-r--r--src/mainboard/intel/bayleybay_fsp/Kconfig1
-rw-r--r--src/northbridge/intel/nehalem/Kconfig1
7 files changed, 7 insertions, 1 deletions
diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig
index 0fb4437cbd..043320cbe9 100644
--- a/src/cpu/intel/fsp_model_206ax/Kconfig
+++ b/src/cpu/intel/fsp_model_206ax/Kconfig
@@ -39,6 +39,7 @@ config CPU_SPECIFIC_OPTIONS
select SUPPORT_CPU_UCODE_IN_CBFS if HAVE_FSP_BIN
select PARALLEL_CPU_INIT
select TSC_SYNC_MFENCE
+ select LAPIC_MONOTONIC_TIMER
config BOOTBLOCK_CPU_INIT
string
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig
index fa02cba2eb..9cda140657 100644
--- a/src/cpu/intel/haswell/Kconfig
+++ b/src/cpu/intel/haswell/Kconfig
@@ -24,6 +24,7 @@ config CPU_SPECIFIC_OPTIONS
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select PARALLEL_CPU_INIT
select PARALLEL_MP
+ select LAPIC_MONOTONIC_TIMER
config BOOTBLOCK_CPU_INIT
string
diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig
index 3ef314d711..8185d3aa44 100644
--- a/src/cpu/intel/model_2065x/Kconfig
+++ b/src/cpu/intel/model_2065x/Kconfig
@@ -18,6 +18,7 @@ config CPU_SPECIFIC_OPTIONS
select PARALLEL_CPU_INIT
#select AP_IN_SIPI_WAIT
select TSC_SYNC_MFENCE
+ select LAPIC_MONOTONIC_TIMER
config BOOTBLOCK_CPU_INIT
string
diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig
index a679e00139..afd155af08 100644
--- a/src/cpu/intel/model_206ax/Kconfig
+++ b/src/cpu/intel/model_206ax/Kconfig
@@ -19,6 +19,7 @@ config CPU_SPECIFIC_OPTIONS
select PARALLEL_CPU_INIT
#select AP_IN_SIPI_WAIT
select TSC_SYNC_MFENCE
+ select LAPIC_MONOTONIC_TIMER
config BOOTBLOCK_CPU_INIT
string
diff --git a/src/mainboard/intel/baskingridge/Kconfig b/src/mainboard/intel/baskingridge/Kconfig
index b52df97b7a..acf4a75735 100644
--- a/src/mainboard/intel/baskingridge/Kconfig
+++ b/src/mainboard/intel/baskingridge/Kconfig
@@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_ACPI_RESUME
select HAVE_SMI_HANDLER
select MAINBOARD_HAS_CHROMEOS
- select LAPIC_MONOTONIC_TIMER
+ select MONOTONIC_TIMER_MSR
config MAINBOARD_DIR
string
diff --git a/src/mainboard/intel/bayleybay_fsp/Kconfig b/src/mainboard/intel/bayleybay_fsp/Kconfig
index 772cc70ef5..7272cbc8fc 100644
--- a/src/mainboard/intel/bayleybay_fsp/Kconfig
+++ b/src/mainboard/intel/bayleybay_fsp/Kconfig
@@ -31,6 +31,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select ENABLE_BUILTIN_COM1 if FSP_PACKAGE_DEFAULT
select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT
select DEFAULT_CONSOLE_LOGLEVEL_7 if FSP_PACKAGE_DEFAULT
+ select TSC_MONOTONIC_TIMER
config MAINBOARD_DIR
string
diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig
index 1da2ef9a4a..18aa0e3f00 100644
--- a/src/northbridge/intel/nehalem/Kconfig
+++ b/src/northbridge/intel/nehalem/Kconfig
@@ -25,6 +25,7 @@ config NORTHBRIDGE_INTEL_NEHALEM
select DYNAMIC_CBMEM
select VGA
select INTEL_EDID
+ select TSC_MONOTONIC_TIMER
if NORTHBRIDGE_INTEL_NEHALEM