diff options
author | Peter Stuge <peter@stuge.se> | 2009-01-26 03:37:40 +0000 |
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committer | Peter Stuge <peter@stuge.se> | 2009-01-26 03:37:40 +0000 |
commit | c800eeb39bda2dbc33187af81d75651b1a9adf14 (patch) | |
tree | dfb452628ecba9300c05ab15ac68fb3a86c48652 | |
parent | 9ee44151cc9b0db006ba23999652e592e88d4708 (diff) | |
download | coreboot-c800eeb39bda2dbc33187af81d75651b1a9adf14.tar.xz |
flashrom: SST25VF040B using 0x90 identification and AAI write.
SST AAI is Auto Address Increment writing, a streamed write to the flash chip
where the first write command sets a starting address and following commands
simply append data. Unfortunately not supported by Winbond SPI masters.
From July 2008.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3913 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | util/flashrom/flash.h | 1 | ||||
-rw-r--r-- | util/flashrom/flashchips.c | 14 | ||||
-rw-r--r-- | util/flashrom/spi.c | 26 |
3 files changed, 41 insertions, 0 deletions
diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h index 0099b1484c..c74bacb399 100644 --- a/util/flashrom/flash.h +++ b/util/flashrom/flash.h @@ -523,6 +523,7 @@ uint8_t spi_read_status_register(); int spi_disable_blockprotect(void); void spi_byte_program(int address, uint8_t byte); int spi_nbyte_read(int address, uint8_t *bytes, int len); +int spi_aai_write(struct flashchip *flash, uint8_t *buf); /* 82802ab.c */ int probe_82802ab(struct flashchip *flash); diff --git a/util/flashrom/flashchips.c b/util/flashrom/flashchips.c index ecadf557b2..950ce63ed1 100644 --- a/util/flashrom/flashchips.c +++ b/util/flashrom/flashchips.c @@ -1128,6 +1128,20 @@ struct flashchip flashchips[] = { { .vendor = "SST", + .name = "SST25VF040B.REMS", + .manufacture_id = 0xbf, + .model_id = 0x8d, + .total_size = 512, + .page_size = 64*1024, + .tested = TEST_OK_PR, + .probe = probe_spi_rems, + .erase = spi_chip_erase_c7, + .write = spi_chip_aai_write, + .read = spi_chip_read, + }, + + { + .vendor = "SST", .name = "SST25VF080B", .manufacture_id = SST_ID, .model_id = SST_25VF080B, diff --git a/util/flashrom/spi.c b/util/flashrom/spi.c index 756fbe5602..57f4b133da 100644 --- a/util/flashrom/spi.c +++ b/util/flashrom/spi.c @@ -615,3 +615,29 @@ int spi_chip_write(struct flashchip *flash, uint8_t *buf) return 1; } + +int spi_aai_write(struct flashchip *flash, uint8_t *buf) { + uint32_t pos = 2, size = flash->total_size * 1024; + unsigned char w[6] = {0xad, 0, 0, 0, buf[0], buf[1]}; + switch (flashbus) { + case BUS_TYPE_WBSIO_SPI: + fprintf(stderr, "%s: impossible with Winbond SPI masters, degrading to byte program\n", __func__); + return spi_chip_write(flash, buf); + default: + break; + } + flash->erase(flash); + spi_write_enable(); + spi_command(6, 0, w, NULL); + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + myusec_delay(5); /* SST25VF040B Tbp is max 10us */ + while (pos < size) { + w[1] = buf[pos++]; + w[2] = buf[pos++]; + spi_command(3, 0, w, NULL); + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + myusec_delay(5); /* SST25VF040B Tbp is max 10us */ + } + spi_write_disable(); + return 0; +} |