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authorStefan Reinauer <stepan@coresystems.de>2007-04-24 18:40:02 +0000
committerStefan Reinauer <stepan@openbios.org>2007-04-24 18:40:02 +0000
commitcdc5cc671197d7b3e5505626650ccc39ead25486 (patch)
treef2307e6706a56e467b2c1001fe92e3d237f760d4
parentb80dbf0caa606f2485a73215496748c4b0c830fa (diff)
downloadcoreboot-cdc5cc671197d7b3e5505626650ccc39ead25486.tar.xz
trivial: fix filename in comment.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/cpu/x86/mtrr/mtrr.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 9f6a9be0df..ab28a23a02 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -1,5 +1,5 @@
/*
- * intel_mtrr.c: setting MTRR to decent values for cache initialization on P6
+ * mtrr.c: setting MTRR to decent values for cache initialization on P6
*
* Derived from intel_set_mtrr in intel_subr.c and mtrr.c in linux kernel
*