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authorTristan Shieh <tristan.shieh@mediatek.com>2018-05-31 09:22:53 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-06-11 10:31:10 +0000
commitcfd8929ac610f5e7ca14b92cd617270d800319f2 (patch)
treeb3a3073f142c6b492f14414eb1cd477006edcc80
parent3ddf57e24ef98284f146cf8d29044d6eea317714 (diff)
downloadcoreboot-cfd8929ac610f5e7ca14b92cd617270d800319f2.tar.xz
google/kukui: Add MediaTek MT8183 reference board
BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: I08644892d34925574f791b000b0035d5afad7022 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26722 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/kukui/Kconfig23
-rw-r--r--src/mainboard/google/kukui/Kconfig.name2
-rw-r--r--src/mainboard/google/kukui/Makefile.inc11
-rw-r--r--src/mainboard/google/kukui/board_info.txt6
-rw-r--r--src/mainboard/google/kukui/chromeos.c31
-rw-r--r--src/mainboard/google/kukui/chromeos.fmd29
-rw-r--r--src/mainboard/google/kukui/devicetree.cb20
-rw-r--r--src/mainboard/google/kukui/memlayout.ld16
-rw-r--r--src/mainboard/google/kukui/romstage.c30
9 files changed, 168 insertions, 0 deletions
diff --git a/src/mainboard/google/kukui/Kconfig b/src/mainboard/google/kukui/Kconfig
new file mode 100644
index 0000000000..fa8099e6bd
--- /dev/null
+++ b/src/mainboard/google/kukui/Kconfig
@@ -0,0 +1,23 @@
+if BOARD_GOOGLE_KUKUI
+
+config VBOOT
+ select VBOOT_MOCK_SECDATA
+
+config BOARD_SPECIFIC_OPTIONS
+ def_bool y
+ select SOC_MEDIATEK_MT8183
+ select BOARD_ROMSIZE_KB_4096
+ select MAINBOARD_HAS_CHROMEOS
+ select COMMON_CBFS_SPI_WRAPPER
+ select SPI_FLASH
+ select FATAL_ASSERTS
+
+config MAINBOARD_DIR
+ string
+ default google/kukui
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "Kukui"
+
+endif
diff --git a/src/mainboard/google/kukui/Kconfig.name b/src/mainboard/google/kukui/Kconfig.name
new file mode 100644
index 0000000000..ce3ac9e90b
--- /dev/null
+++ b/src/mainboard/google/kukui/Kconfig.name
@@ -0,0 +1,2 @@
+config BOARD_GOOGLE_KUKUI
+ bool "Kukui"
diff --git a/src/mainboard/google/kukui/Makefile.inc b/src/mainboard/google/kukui/Makefile.inc
new file mode 100644
index 0000000000..44a60b558d
--- /dev/null
+++ b/src/mainboard/google/kukui/Makefile.inc
@@ -0,0 +1,11 @@
+bootblock-y += memlayout.ld
+
+verstage-y += chromeos.c
+verstage-y += memlayout.ld
+
+romstage-y += chromeos.c
+romstage-y += memlayout.ld
+romstage-y += romstage.c
+
+ramstage-y += chromeos.c
+ramstage-y += memlayout.ld
diff --git a/src/mainboard/google/kukui/board_info.txt b/src/mainboard/google/kukui/board_info.txt
new file mode 100644
index 0000000000..c3688c1e0d
--- /dev/null
+++ b/src/mainboard/google/kukui/board_info.txt
@@ -0,0 +1,6 @@
+Vendor name: Google
+Board name: Kukui MediaTek MT8183 reference board
+Category: eval
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: y
diff --git a/src/mainboard/google/kukui/chromeos.c b/src/mainboard/google/kukui/chromeos.c
new file mode 100644
index 0000000000..7f9946ae40
--- /dev/null
+++ b/src/mainboard/google/kukui/chromeos.c
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootmode.h>
+#include <boot/coreboot_tables.h>
+
+void fill_lb_gpios(struct lb_gpios *gpios)
+{
+}
+
+int get_recovery_mode_switch(void)
+{
+ return 0;
+}
+
+int get_write_protect_state(void)
+{
+ return 0;
+}
diff --git a/src/mainboard/google/kukui/chromeos.fmd b/src/mainboard/google/kukui/chromeos.fmd
new file mode 100644
index 0000000000..9c618e3cdf
--- /dev/null
+++ b/src/mainboard/google/kukui/chromeos.fmd
@@ -0,0 +1,29 @@
+FLASH@0x0 0x400000 {
+ WP_RO@0x0 0x200000 {
+ RO_SECTION@0x0 0x1f0000 {
+ BOOTBLOCK@0 128K
+ COREBOOT(CBFS)@0x20000 0xe0000
+ FMAP@0x100000 0x1000
+ GBB@0x101000 0xeef00
+ RO_FRID@0x1eff00 0x100
+ }
+ RO_VPD@0x1f0000 0x10000
+ }
+ RW_SECTION_A@0x200000 0x78000 {
+ VBLOCK_A@0x0 0x2000
+ FW_MAIN_A(CBFS)@0x2000 0x75f00
+ RW_FWID_A@0x77f00 0x100
+ }
+ RW_SHARED@0x278000 0x2000 {
+ SHARED_DATA@0x0 0x2000
+ }
+ RW_NVRAM@0x27a000 0x2000
+ RW_ELOG@0x27c000 0x4000
+ RW_SECTION_B@0x280000 0x78000 {
+ VBLOCK_B@0x0 0x2000
+ FW_MAIN_B(CBFS)@0x2000 0x75f00
+ RW_FWID_B@0x77f00 0x100
+ }
+ RW_VPD@0x2f8000 0x8000
+ RW_LEGACY(CBFS)@0x300000 0x100000
+}
diff --git a/src/mainboard/google/kukui/devicetree.cb b/src/mainboard/google/kukui/devicetree.cb
new file mode 100644
index 0000000000..e2f2be34a2
--- /dev/null
+++ b/src/mainboard/google/kukui/devicetree.cb
@@ -0,0 +1,20 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2018 MediaTek Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+chip soc/mediatek/mt8183
+ device cpu_cluster 0 on
+ device cpu 0 on end
+ end
+end
diff --git a/src/mainboard/google/kukui/memlayout.ld b/src/mainboard/google/kukui/memlayout.ld
new file mode 100644
index 0000000000..f10e55b7bf
--- /dev/null
+++ b/src/mainboard/google/kukui/memlayout.ld
@@ -0,0 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/memlayout.ld>
diff --git a/src/mainboard/google/kukui/romstage.c b/src/mainboard/google/kukui/romstage.c
new file mode 100644
index 0000000000..d63b7c888d
--- /dev/null
+++ b/src/mainboard/google/kukui/romstage.c
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/exception.h>
+#include <console/console.h>
+#include <program_loading.h>
+#include <timestamp.h>
+
+void main(void)
+{
+ timestamp_add_now(TS_START_ROMSTAGE);
+
+ /* Init UART baudrate when PLL on. */
+ console_init();
+ exception_init();
+
+ run_ramstage();
+}