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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-03 07:30:26 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-14 14:08:57 +0000
commitde640781020b10e72dd6a5cda26cab10932e94fe (patch)
treef3e43318b33a10918c906458e6b03b2a2194d7ee
parent91c47c0deac054d5b949d1bf1be7c0e7cbf7d545 (diff)
downloadcoreboot-de640781020b10e72dd6a5cda26cab10932e94fe.tar.xz
bootblock: Provide some common prototypes
The split of bootblock initialisation to cpu, northbridge and southbridge is not specific to intel at all, create new header <arch/bootblock.h> as AMD will want some of these too. Change-Id: I702cc6bad4afee4f61acf58b9155608b28eb417e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37429 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/arch/x86/include/arch/bootblock.h (renamed from src/cpu/intel/car/bootblock.h)4
-rw-r--r--src/cpu/intel/car/bootblock.c2
-rw-r--r--src/cpu/intel/haswell/bootblock.c2
-rw-r--r--src/cpu/intel/model_206ax/bootblock.c2
-rw-r--r--src/northbridge/intel/gm45/bootblock.c2
-rw-r--r--src/northbridge/intel/haswell/bootblock.c2
-rw-r--r--src/northbridge/intel/i945/bootblock.c2
-rw-r--r--src/northbridge/intel/nehalem/bootblock.c2
-rw-r--r--src/northbridge/intel/pineview/bootblock.c2
-rw-r--r--src/northbridge/intel/sandybridge/bootblock.c2
-rw-r--r--src/northbridge/intel/x4x/bootblock.c2
-rw-r--r--src/soc/intel/baytrail/bootblock/bootblock.c2
-rw-r--r--src/soc/intel/broadwell/bootblock/cpu.c4
-rw-r--r--src/soc/intel/broadwell/bootblock/pch.c2
-rw-r--r--src/soc/intel/broadwell/bootblock/systemagent.c2
-rw-r--r--src/southbridge/intel/bd82x6x/bootblock.c2
-rw-r--r--src/southbridge/intel/i82371eb/bootblock.c2
-rw-r--r--src/southbridge/intel/i82801dx/bootblock.c2
-rw-r--r--src/southbridge/intel/i82801gx/bootblock.c2
-rw-r--r--src/southbridge/intel/i82801ix/bootblock.c2
-rw-r--r--src/southbridge/intel/i82801jx/bootblock.c2
-rw-r--r--src/southbridge/intel/ibexpeak/bootblock.c2
-rw-r--r--src/southbridge/intel/lynxpoint/bootblock.c2
23 files changed, 25 insertions, 25 deletions
diff --git a/src/cpu/intel/car/bootblock.h b/src/arch/x86/include/arch/bootblock.h
index 5adfd8711d..1ca4a762de 100644
--- a/src/cpu/intel/car/bootblock.h
+++ b/src/arch/x86/include/arch/bootblock.h
@@ -11,8 +11,8 @@
* GNU General Public License for more details.
*/
-#ifndef _CPU_INTEL_CAR_BOOTBLOCK_H
-#define _CPU_INTEL_CAR_BOOTBLOCK_H
+#ifndef __ARCH_BOOTBLOCK_H__
+#define __ARCH_BOOTBLOCK_H__
void bootblock_early_cpu_init(void);
void bootblock_early_northbridge_init(void);
diff --git a/src/cpu/intel/car/bootblock.c b/src/cpu/intel/car/bootblock.c
index 664c2b5074..e60a65a7b2 100644
--- a/src/cpu/intel/car/bootblock.c
+++ b/src/cpu/intel/car/bootblock.c
@@ -12,7 +12,7 @@
*/
#include <bootblock_common.h>
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
#include <cpu/x86/bist.h>
static uint32_t saved_bist;
diff --git a/src/cpu/intel/haswell/bootblock.c b/src/cpu/intel/haswell/bootblock.c
index 94e5d36e18..70a4682175 100644
--- a/src/cpu/intel/haswell/bootblock.c
+++ b/src/cpu/intel/haswell/bootblock.c
@@ -13,6 +13,7 @@
#include <stdint.h>
#include <arch/cpu.h>
+#include <arch/bootblock.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
#include <arch/io.h>
@@ -21,7 +22,6 @@
#include "haswell.h"
#include <southbridge/intel/lynxpoint/pch.h>
-#include <cpu/intel/car/bootblock.h>
static void set_flex_ratio_to_tdp_nominal(void)
{
diff --git a/src/cpu/intel/model_206ax/bootblock.c b/src/cpu/intel/model_206ax/bootblock.c
index da0333f4bc..a504480bca 100644
--- a/src/cpu/intel/model_206ax/bootblock.c
+++ b/src/cpu/intel/model_206ax/bootblock.c
@@ -12,11 +12,11 @@
*/
#include <stdint.h>
+#include <arch/bootblock.h>
#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <arch/io.h>
#include <halt.h>
-#include <cpu/intel/car/bootblock.h>
#include "model_206ax.h"
diff --git a/src/northbridge/intel/gm45/bootblock.c b/src/northbridge/intel/gm45/bootblock.c
index d3aeb030f1..dda2b585f1 100644
--- a/src/northbridge/intel/gm45/bootblock.c
+++ b/src/northbridge/intel/gm45/bootblock.c
@@ -11,7 +11,7 @@
* GNU General Public License for more details.
*/
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
/* Just re-define these instead of including gm45.h. It blows up romcc. */
diff --git a/src/northbridge/intel/haswell/bootblock.c b/src/northbridge/intel/haswell/bootblock.c
index 2c1bd58dde..04fec6fe65 100644
--- a/src/northbridge/intel/haswell/bootblock.c
+++ b/src/northbridge/intel/haswell/bootblock.c
@@ -11,8 +11,8 @@
* GNU General Public License for more details.
*/
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
#include "haswell.h"
void bootblock_early_northbridge_init(void)
diff --git a/src/northbridge/intel/i945/bootblock.c b/src/northbridge/intel/i945/bootblock.c
index e86abe5ab1..38564bded1 100644
--- a/src/northbridge/intel/i945/bootblock.c
+++ b/src/northbridge/intel/i945/bootblock.c
@@ -11,7 +11,7 @@
* GNU General Public License for more details.
*/
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
#include "i945.h"
diff --git a/src/northbridge/intel/nehalem/bootblock.c b/src/northbridge/intel/nehalem/bootblock.c
index 46cdef0c47..2f9f7da916 100644
--- a/src/northbridge/intel/nehalem/bootblock.c
+++ b/src/northbridge/intel/nehalem/bootblock.c
@@ -11,8 +11,8 @@
* GNU General Public License for more details.
*/
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
void bootblock_early_northbridge_init(void)
{
diff --git a/src/northbridge/intel/pineview/bootblock.c b/src/northbridge/intel/pineview/bootblock.c
index bd510b00ee..98085a7406 100644
--- a/src/northbridge/intel/pineview/bootblock.c
+++ b/src/northbridge/intel/pineview/bootblock.c
@@ -11,8 +11,8 @@
* GNU General Public License for more details.
*/
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
#include "pineview.h"
#define MMCONF_256_BUSSES 16
diff --git a/src/northbridge/intel/sandybridge/bootblock.c b/src/northbridge/intel/sandybridge/bootblock.c
index 40819bf7eb..74114963c3 100644
--- a/src/northbridge/intel/sandybridge/bootblock.c
+++ b/src/northbridge/intel/sandybridge/bootblock.c
@@ -11,8 +11,8 @@
* GNU General Public License for more details.
*/
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
#include "sandybridge.h"
void bootblock_early_northbridge_init(void)
diff --git a/src/northbridge/intel/x4x/bootblock.c b/src/northbridge/intel/x4x/bootblock.c
index 64643dd79c..0120132c78 100644
--- a/src/northbridge/intel/x4x/bootblock.c
+++ b/src/northbridge/intel/x4x/bootblock.c
@@ -14,8 +14,8 @@
* GNU General Public License for more details.
*/
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
#include "x4x.h"
#include "iomap.h"
diff --git a/src/soc/intel/baytrail/bootblock/bootblock.c b/src/soc/intel/baytrail/bootblock/bootblock.c
index 1c5bfc54d6..b5a786bdf5 100644
--- a/src/soc/intel/baytrail/bootblock/bootblock.c
+++ b/src/soc/intel/baytrail/bootblock/bootblock.c
@@ -13,7 +13,7 @@
* GNU General Public License for more details.
*/
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
#include <soc/iosf.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/broadwell/bootblock/cpu.c b/src/soc/intel/broadwell/bootblock/cpu.c
index f3c35f3441..4c6ab75ef9 100644
--- a/src/soc/intel/broadwell/bootblock/cpu.c
+++ b/src/soc/intel/broadwell/bootblock/cpu.c
@@ -14,15 +14,15 @@
*/
#include <stdint.h>
+#include <arch/bootblock.h>
+#include <arch/io.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
-#include <arch/io.h>
#include <halt.h>
#include <soc/rcba.h>
#include <soc/msr.h>
#include <delay.h>
-#include <cpu/intel/car/bootblock.h>
static void set_flex_ratio_to_tdp_nominal(void)
{
diff --git a/src/soc/intel/broadwell/bootblock/pch.c b/src/soc/intel/broadwell/bootblock/pch.c
index 590961b361..7ea4a58e1f 100644
--- a/src/soc/intel/broadwell/bootblock/pch.c
+++ b/src/soc/intel/broadwell/bootblock/pch.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
#include <soc/iomap.h>
#include <soc/lpc.h>
@@ -22,7 +23,6 @@
#include <reg_script.h>
#include <soc/pm.h>
#include <soc/romstage.h>
-#include <cpu/intel/car/bootblock.h>
/*
* Enable Prefetching and Caching.
diff --git a/src/soc/intel/broadwell/bootblock/systemagent.c b/src/soc/intel/broadwell/bootblock/systemagent.c
index 7aaed789ac..c9c7d95ca6 100644
--- a/src/soc/intel/broadwell/bootblock/systemagent.c
+++ b/src/soc/intel/broadwell/bootblock/systemagent.c
@@ -13,10 +13,10 @@
* GNU General Public License for more details.
*/
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
#include <soc/pci_devs.h>
#include <soc/systemagent.h>
-#include <cpu/intel/car/bootblock.h>
void bootblock_early_northbridge_init(void)
{
diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c
index 1a8242f8d4..f2e32da130 100644
--- a/src/southbridge/intel/bd82x6x/bootblock.c
+++ b/src/southbridge/intel/bd82x6x/bootblock.c
@@ -13,7 +13,7 @@
* GNU General Public License for more details.
*/
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
#include "pch.h"
diff --git a/src/southbridge/intel/i82371eb/bootblock.c b/src/southbridge/intel/i82371eb/bootblock.c
index a6d62e03e0..711b317e16 100644
--- a/src/southbridge/intel/i82371eb/bootblock.c
+++ b/src/southbridge/intel/i82371eb/bootblock.c
@@ -15,10 +15,10 @@
*/
#include <stdint.h>
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <device/pci_type.h>
-#include <cpu/intel/car/bootblock.h>
#include "i82371eb.h"
#define PCI_ID(VENDOR_ID, DEVICE_ID) \
diff --git a/src/southbridge/intel/i82801dx/bootblock.c b/src/southbridge/intel/i82801dx/bootblock.c
index ef348553cc..31452a58cf 100644
--- a/src/southbridge/intel/i82801dx/bootblock.c
+++ b/src/southbridge/intel/i82801dx/bootblock.c
@@ -11,7 +11,7 @@
* GNU General Public License for more details.
*/
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
void bootblock_early_southbridge_init(void)
diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c
index 4c464ff920..f470526589 100644
--- a/src/southbridge/intel/i82801gx/bootblock.c
+++ b/src/southbridge/intel/i82801gx/bootblock.c
@@ -13,8 +13,8 @@
* GNU General Public License for more details.
*/
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
#include "i82801gx.h"
static void enable_spi_prefetch(void)
diff --git a/src/southbridge/intel/i82801ix/bootblock.c b/src/southbridge/intel/i82801ix/bootblock.c
index 0b50d61fba..b2701514a9 100644
--- a/src/southbridge/intel/i82801ix/bootblock.c
+++ b/src/southbridge/intel/i82801ix/bootblock.c
@@ -13,8 +13,8 @@
* GNU General Public License for more details.
*/
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
#include "i82801ix.h"
diff --git a/src/southbridge/intel/i82801jx/bootblock.c b/src/southbridge/intel/i82801jx/bootblock.c
index b6016793c2..567679ebcc 100644
--- a/src/southbridge/intel/i82801jx/bootblock.c
+++ b/src/southbridge/intel/i82801jx/bootblock.c
@@ -13,8 +13,8 @@
* GNU General Public License for more details.
*/
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
#include "i82801jx.h"
static void enable_spi_prefetch(void)
diff --git a/src/southbridge/intel/ibexpeak/bootblock.c b/src/southbridge/intel/ibexpeak/bootblock.c
index c8b1d6ef31..0076864db9 100644
--- a/src/southbridge/intel/ibexpeak/bootblock.c
+++ b/src/southbridge/intel/ibexpeak/bootblock.c
@@ -13,8 +13,8 @@
* GNU General Public License for more details.
*/
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
#include "pch.h"
#include "chip.h"
diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c
index 39e69257eb..21475745c1 100644
--- a/src/southbridge/intel/lynxpoint/bootblock.c
+++ b/src/southbridge/intel/lynxpoint/bootblock.c
@@ -13,8 +13,8 @@
* GNU General Public License for more details.
*/
+#include <arch/bootblock.h>
#include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
#include "pch.h"
/*