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author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2018-07-07 14:50:34 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-17 11:53:32 +0000 |
commit | e73e81d02928a9b369861e996eaf4c5c64d76cc2 (patch) | |
tree | cbd87922bb02c80ddf835b9624a4f0f5898f2874 | |
parent | 812a83974447b67e98740afecb9ca7ef5d1db2fc (diff) | |
download | coreboot-e73e81d02928a9b369861e996eaf4c5c64d76cc2.tar.xz |
Documentation/mb/sifive: Update TODO list; UART driver has been merged
See 894e3a9ec8 ("drivers/uart: Add a driver for SiFive's UART").
Change-Id: I035c238beba28ecafd296f18c0ccda167126ab94
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/27398
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
-rw-r--r-- | Documentation/mainboard/sifive/hifive-unleashed.md | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/Documentation/mainboard/sifive/hifive-unleashed.md b/Documentation/mainboard/sifive/hifive-unleashed.md index bdf5e3c341..62ee82401c 100644 --- a/Documentation/mainboard/sifive/hifive-unleashed.md +++ b/Documentation/mainboard/sifive/hifive-unleashed.md @@ -12,7 +12,6 @@ For general setup instructions, please refer to the [Getting Started Guide]. The following things are still missing from this coreboot port: - Trampoline in the MBR block to support boot mode 1 -- SiFive UART driver - CBMEM support - FU540 clock configuration - FU540 RAM init |