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authorAndrey Petrov <andrey.petrov@intel.com>2016-03-29 14:19:53 -0700
committerAaron Durbin <adurbin@chromium.org>2016-05-18 07:06:39 +0200
commitf87275f8216aa230c6f05069eeeb07a17a99ef43 (patch)
treeb639a08c12cda3d0881de2e9069e2a493fa185da
parent664d585882a8c2404ab1977486c60ae12e985938 (diff)
downloadcoreboot-f87275f8216aa230c6f05069eeeb07a17a99ef43.tar.xz
soc/intel/apollolake: Enable ACPI PM1 timer emulation
Enable emulation for ACPI PM1 timer. This is needed by FSP-M MemoryInit. Change-Id: I7a441f5f1673e6430697615ae7251da948e77548 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/14821 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--src/soc/intel/apollolake/bootblock/bootblock.c14
-rw-r--r--src/soc/intel/apollolake/include/soc/cpu.h2
2 files changed, 16 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index 833f531936..cd23f5984b 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -20,6 +20,7 @@
#include <device/pci.h>
#include <lib.h>
#include <soc/bootblock.h>
+#include <soc/iomap.h>
#include <soc/cpu.h>
#include <soc/gpio.h>
#include <soc/northbridge.h>
@@ -36,6 +37,17 @@ static void tpm_enable(void)
gpio_configure_pads(tpm_spi_configs, ARRAY_SIZE(tpm_spi_configs));
}
+static void enable_pm_timer(void)
+{
+ /* ACPI PM timer emulation */
+ msr_t msr;
+ /* Multiplier value that somehow 3.579545MHz freq */
+ msr.hi = 0x2FBA2E25;
+ /* Set PM1 timer IO port and enable*/
+ msr.lo = EMULATE_PM_TMR_EN | (ACPI_PMIO_BASE + R_ACPI_PM1_TMR);
+ wrmsr(MSR_EMULATE_PM_TMR, msr);
+}
+
void asmlinkage bootblock_c_entry(void)
{
device_t dev = NB_DEV_ROOT;
@@ -80,5 +92,7 @@ void bootblock_soc_early_init(void)
if (IS_ENABLED(CONFIG_TPM_ON_FAST_SPI))
tpm_enable();
+ enable_pm_timer();
+
cache_bios_region();
}
diff --git a/src/soc/intel/apollolake/include/soc/cpu.h b/src/soc/intel/apollolake/include/soc/cpu.h
index aaa2001f8b..b731d4f539 100644
--- a/src/soc/intel/apollolake/include/soc/cpu.h
+++ b/src/soc/intel/apollolake/include/soc/cpu.h
@@ -32,6 +32,8 @@ void apollolake_init_cpus(struct device *dev);
#define MSR_POWER_MISC 0x120
#define MSR_CORE_THREAD_COUNT 0x35
#define MSR_EVICT_CTL 0x2e0
+#define MSR_EMULATE_PM_TMR 0x121
+#define EMULATE_PM_TMR_EN (1 << 16)
#define BASE_CLOCK_MHZ 100