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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-11-09 08:05:03 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-11 10:29:24 +0000 |
| commit | 10cfd4d7cfc3196449e3ba80f8d2538e113ef7e8 (patch) | |
| tree | ed753055ba5c48a3fefdd2a2bdff59825bdd27c5 | |
| parent | e396c662c0916a8938cbc0cab4bd5820088e26a4 (diff) | |
| download | coreboot-10cfd4d7cfc3196449e3ba80f8d2538e113ef7e8.tar.xz | |
mb/{x4x}: Remove unused 'include <northbridge/intel/x4x/iomap.h>'
Change-Id: I82f1d4325ea87585137fa81567aa82b80454c704
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36693
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
| -rw-r--r-- | src/mainboard/asrock/g41c-gs/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/asus/p5qc/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/asus/p5qpl-am/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/foxconn/g41s-k/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/gigabyte/ga-g41m-es2l/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/intel/dg41wv/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/intel/dg43gt/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/lenovo/thinkcentre_a58/romstage.c | 1 |
8 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c index bb7a342d75..57d1ec2c2c 100644 --- a/src/mainboard/asrock/g41c-gs/romstage.c +++ b/src/mainboard/asrock/g41c-gs/romstage.c @@ -19,7 +19,6 @@ #include <device/pci_ops.h> #include <console/console.h> #include <arch/romstage.h> -#include <northbridge/intel/x4x/iomap.h> #include <northbridge/intel/x4x/x4x.h> #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/pmclib.h> diff --git a/src/mainboard/asus/p5qc/romstage.c b/src/mainboard/asus/p5qc/romstage.c index 1477d80ea3..fb30beeffb 100644 --- a/src/mainboard/asus/p5qc/romstage.c +++ b/src/mainboard/asus/p5qc/romstage.c @@ -23,7 +23,6 @@ #include <arch/romstage.h> #include <superio/winbond/w83667hg-a/w83667hg-a.h> #include <superio/winbond/common/winbond.h> -#include <northbridge/intel/x4x/iomap.h> #define SERIAL_DEV PNP_DEV(0x2e, W83667HG_A_SP1) #define LPC_DEV PCI_DEV(0, 0x1f, 0) diff --git a/src/mainboard/asus/p5qpl-am/romstage.c b/src/mainboard/asus/p5qpl-am/romstage.c index 30480ad3d5..2836bf7941 100644 --- a/src/mainboard/asus/p5qpl-am/romstage.c +++ b/src/mainboard/asus/p5qpl-am/romstage.c @@ -22,7 +22,6 @@ #include <arch/romstage.h> #include <cpu/intel/speedstep.h> #include <cpu/x86/msr.h> -#include <northbridge/intel/x4x/iomap.h> #include <northbridge/intel/x4x/x4x.h> #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/pmclib.h> diff --git a/src/mainboard/foxconn/g41s-k/romstage.c b/src/mainboard/foxconn/g41s-k/romstage.c index 0bfbbfe28c..01473c80fc 100644 --- a/src/mainboard/foxconn/g41s-k/romstage.c +++ b/src/mainboard/foxconn/g41s-k/romstage.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <arch/romstage.h> #include <device/pci_ops.h> -#include <northbridge/intel/x4x/iomap.h> #include <northbridge/intel/x4x/x4x.h> #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/pmclib.h> diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c index d4ce9401c1..8ba173eec6 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c @@ -25,7 +25,6 @@ #include <arch/romstage.h> #include <superio/ite/it8718f/it8718f.h> #include <superio/ite/common/ite.h> -#include <northbridge/intel/x4x/iomap.h> #define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1) #define GPIO_DEV PNP_DEV(0x2e, IT8718F_GPIO) diff --git a/src/mainboard/intel/dg41wv/romstage.c b/src/mainboard/intel/dg41wv/romstage.c index 81d50670e9..a6969ad4d2 100644 --- a/src/mainboard/intel/dg41wv/romstage.c +++ b/src/mainboard/intel/dg41wv/romstage.c @@ -19,7 +19,6 @@ #include <device/pci_ops.h> #include <console/console.h> #include <arch/romstage.h> -#include <northbridge/intel/x4x/iomap.h> #include <northbridge/intel/x4x/x4x.h> #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/pmclib.h> diff --git a/src/mainboard/intel/dg43gt/romstage.c b/src/mainboard/intel/dg43gt/romstage.c index 8207638a5b..018df1bedf 100644 --- a/src/mainboard/intel/dg43gt/romstage.c +++ b/src/mainboard/intel/dg43gt/romstage.c @@ -23,7 +23,6 @@ #include <arch/romstage.h> #include <superio/winbond/w83627dhg/w83627dhg.h> #include <superio/winbond/common/winbond.h> -#include <northbridge/intel/x4x/iomap.h> #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1) #define LPC_DEV PCI_DEV(0, 0x1f, 0) diff --git a/src/mainboard/lenovo/thinkcentre_a58/romstage.c b/src/mainboard/lenovo/thinkcentre_a58/romstage.c index cb84ce07f5..10889a9286 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/romstage.c +++ b/src/mainboard/lenovo/thinkcentre_a58/romstage.c @@ -23,7 +23,6 @@ #include <arch/romstage.h> #include <device/pci_ops.h> #include <superio/smsc/smscsuperio/smscsuperio.h> -#include <northbridge/intel/x4x/iomap.h> #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) #define LPC_DEV PCI_DEV(0, 0x1f, 0) |