frag_fffba1df

2 files changed, 60 insertions, 82 deletions

diff --git a/src/northbridge/intel/haswell/mrc.asm b/src/northbridge/intel/haswell/mrc.asm
index 770b376e2c..5d07d97a2a 100644
--- a/src/northbridge/intel/haswell/mrc.asm
+++ b/src/northbridge/intel/haswell/mrc.asm
@@ -183,6 +183,7 @@ extern frag_fffa627c
 extern frag_fffa0ff3
 extern frag_fffa1e83
 extern frag_fffa9029
+extern frag_fffba1df
 
 ;;
 
@@ -28306,88 +28307,10 @@ add esp, 0x10
 
 loc_fffba1df:
 mov edx, dword [ebp - 0x28]
-mov eax, dword [0xf0000060]
-and eax, 0xfc000000
-movzx ecx, byte [edx + 1]
-shl ecx, 0x14
-add eax, ecx
-mov ecx, dword [0xf0000060]
-mov ecx, dword [edx + 0xe]
-mov esi, dword [ecx]
-mov ecx, dword [edx + 0x26]
-mov ecx, dword [ecx + 1]
-mov dword [eax + 0xfe040], ecx
-mov dword [eax + 0xfe044], 0
-mov ebx, dword [eax + 0xfe040]
-or ebx, 1
-mov dword [eax + 0xfe040], ebx
-mov word [ecx + 0x10], 0x154
-mov byte [ecx + 6], 0xff
-mov byte [ecx + 0x80], 0xff
-mov byte [ecx + 0x84], 0
-mov byte [ecx + 0x82], 0
-mov ebx, dword [0xf0000060]
-and ebx, 0xfc000000
-mov ebx, dword [ebx + 0xf80f0]
-and ebx, 0xfffffffe
-mov ebx, dword [ebx + 0x38b0]
-mov edi, dword [0xf0000060]
-and edi, 0xfc000000
-and ebx, 0xffff8003
-or ebx, 0x403c
-mov edi, dword [edi + 0xf80f0]
-and edi, 0xfffffffe
-mov dword [edi + 0x38b0], ebx
-mov ebx, dword [0xf0000060]
-and ebx, 0xfc000000
-mov ebx, dword [ebx + 0xf80f0]
-and ebx, 0xfffffffe
-mov ebx, dword [ebx + 0x38b4]
-and bh, 0x40
-je short loc_fffba2aa  ; je 0xfffba2aa
-mov byte [ecx + 0xa], 1
-
-loc_fffba2aa:
-mov ecx, dword [eax + 0xfe040]
-and ecx, 0xfffffffe
-mov dword [eax + 0xfe040], ecx
-mov dword [eax + 0xfe040], 0
-test byte [esi], 1
-je short loc_fffba341  ; je 0xfffba341
-mov bl, byte [esi + 1]
-mov cl, byte [esi + 2]
-mov eax, ebx
-shl eax, 0x1e
-and eax, 0x40000000
-mov edi, eax
-or edi, 0x80000000
-test cl, 1
-cmovne eax, edi
-mov edi, eax
-or edi, 0x4000
-and bl, 2
-cmovne eax, edi
-mov ebx, eax
-or bh, 0x80
-and cl, 2
-cmovne eax, ebx
-mov ebx, dword [edx + 2]
-mov ecx, dword [ebx + 0x33d4]
-and ecx, 0xfff0fff
-or eax, ecx
-mov dword [ebx + 0x33d4], eax
-mov al, byte [esi + 1]
-shl eax, 8
-and eax, 0x400
-mov ecx, eax
-or ch, 8
-test byte [esi + 2], 4
-cmovne eax, ecx
-mov ecx, dword [edx + 2]
-mov edx, dword [ecx + 0x33c8]
-and dh, 0xf0
-or eax, edx
-mov dword [ecx + 0x33c8], eax
+
+push edx
+call frag_fffba1df
+add esp, 4
 
 loc_fffba341:
 mov eax, dword [ebp - 0x28]
diff --git a/src/northbridge/intel/haswell/mrc_frags.c b/src/northbridge/intel/haswell/mrc_frags.c
index 590ea884f2..d0061a2d3b 100644
--- a/src/northbridge/intel/haswell/mrc_frags.c
+++ b/src/northbridge/intel/haswell/mrc_frags.c
@@ -127,3 +127,58 @@ void frag_fffa9029(void *bar)
 	bar_or32(bar, 0x78, 0x0400);
 	bar_or32(bar, 0x50, 1);
 }
+
+void frag_fffba1df(void *edx);
+void frag_fffba1df(void *edx)
+{
+	uint32_t pciexbar = read32((void*)0xf0000060) & 0xfc000000;
+	uint32_t bus = *(uint8_t*)(edx + 1);
+
+	/* well, bus is just 0...
+	printk(BIOS_DEBUG, "frag_fffba1df: bus = %d.\n", bus);
+	*/
+
+	void * bbar = (void*)(pciexbar + (bus << 20));
+	read32((void*)0xf0000060);
+	void *p1 = *(void**)(edx + 0xe);
+	uint8_t *pp = *(uint8_t**)p1;
+	p1 = *(void**)(edx + 0x26);
+	void *p2 = *(void**)(p1 + 1);
+	write32(bbar + 0xfe040, (u32)p2);
+	write32(bbar + 0xfe044, 0);
+	u32 tmp = read32(bbar + 0xfe040);
+	tmp |= 1;
+	write32(bbar + 0xfe040, tmp);
+	write16(p2 + 0x10, 0x154);
+	write8(p2 + 6, 0xff);
+	write8(p2 + 0x80, 0xff);
+	write8(p2 + 0x84, 0);
+	write8(p2 + 0x82, 0);
+
+	RCBA32_AND_OR(0x38b0, 0xffff8003, 0x403c);
+	tmp = RCBA32(0x38b4);
+	tmp &= 0xffff40ff;
+	if (tmp != 0) {
+		*(u8*)(p2 + 0xa) = 1;
+	}
+	tmp = read32(bbar + 0xfe040);
+	tmp &= 0xfffffffe;
+	write32(bbar + 0xfe040, tmp);
+	write32(bbar + 0xfe040, 0);
+
+	if ((pp[0] & 1) == 0)
+		return;
+
+	u8 bl = pp[1]; u8 cl = pp[2];
+	tmp = (u32)bl << 30;
+	tmp &= 0x40000000;
+	if (cl & 1) tmp |= 0x80000000;
+	if (bl & 2) tmp |= 0x4000;
+	if (cl & 2) tmp |= 0x8000;
+
+	void *bar1 = *(void**)(edx + 2);
+	bar_update32(bar1, 0x33d4, 0x0fff0fff, tmp);
+	tmp = ((u32)pp[1] << 8) & 0x400;
+	if (pp[2] & 4) tmp |= 0x0800;
+	bar_update32(bar1, 0x33c8, 0xfffff0ff, tmp);
+}