diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-09 15:29:13 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-09 15:29:13 +0000 |
commit | 2c0db453b69e025049bc114c21fdc294648eefdf (patch) | |
tree | 24917a521a8271654881015b1e6e707bf7441d08 | |
parent | d4f53738e678f99bd12068b2e2b2ecae9fc046b0 (diff) | |
download | coreboot-2c0db453b69e025049bc114c21fdc294648eefdf.tar.xz |
fix the broken nvidia chipset boards,
remove more warnings.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5397 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | src/arch/i386/include/arch/stages.h | 24 | ||||
-rw-r--r-- | src/mainboard/asus/a8v-e_se/acpi_tables.c | 2 | ||||
-rw-r--r-- | src/mainboard/asus/a8v-e_se/mptable.c | 1 | ||||
-rw-r--r-- | src/mainboard/asus/m2v-mx_se/mainboard.c | 3 | ||||
-rw-r--r-- | src/mainboard/broadcom/blast/mptable.c | 1 | ||||
-rw-r--r-- | src/mainboard/broadcom/blast/romstage.c | 4 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/setup_resource_map.c | 2 | ||||
-rw-r--r-- | src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c | 1 | ||||
-rw-r--r-- | src/southbridge/intel/i82801ax/i82801ax_smbus.h | 15 |
9 files changed, 32 insertions, 21 deletions
diff --git a/src/arch/i386/include/arch/stages.h b/src/arch/i386/include/arch/stages.h index dd73220507..00d2a93ea3 100644 --- a/src/arch/i386/include/arch/stages.h +++ b/src/arch/i386/include/arch/stages.h @@ -1,5 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __ARCH_STAGES_H +#define __ARCH_STAGES_H void cbfs_and_run_core(const char *filename, unsigned int ebp); void __attribute__((regparm(0))) copy_and_run(unsigned cpu_reset); void __attribute__((regparm(0))) copy_and_run_ap_code_in_car(unsigned ret_addr); - - +#endif diff --git a/src/mainboard/asus/a8v-e_se/acpi_tables.c b/src/mainboard/asus/a8v-e_se/acpi_tables.c index 4108ed1b4a..dd94b85215 100644 --- a/src/mainboard/asus/a8v-e_se/acpi_tables.c +++ b/src/mainboard/asus/a8v-e_se/acpi_tables.c @@ -87,8 +87,6 @@ unsigned long write_acpi_tables(unsigned long start) acpi_srat_t *srat; acpi_rsdt_t *rsdt; acpi_mcfg_t *mcfg; - acpi_hpet_t *hpet; - acpi_madt_t *madt; acpi_fadt_t *fadt; acpi_facs_t *facs; acpi_header_t *dsdt; diff --git a/src/mainboard/asus/a8v-e_se/mptable.c b/src/mainboard/asus/a8v-e_se/mptable.c index 53187a0c8b..40e665dbc9 100644 --- a/src/mainboard/asus/a8v-e_se/mptable.c +++ b/src/mainboard/asus/a8v-e_se/mptable.c @@ -29,7 +29,6 @@ static void *smp_write_config_table(void *v) static const char oem[8] = "LNXB "; static const char productid[12] = "A8V-E SE "; struct mp_config_table *mc; - unsigned int conforms = 0; int bus_isa = 42; mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); diff --git a/src/mainboard/asus/m2v-mx_se/mainboard.c b/src/mainboard/asus/m2v-mx_se/mainboard.c index abfd8b70f4..4d53091882 100644 --- a/src/mainboard/asus/m2v-mx_se/mainboard.c +++ b/src/mainboard/asus/m2v-mx_se/mainboard.c @@ -21,8 +21,9 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <boot/tables.h> +#include <arch/coreboot_tables.h> #include "chip.h" -#include <../../../southbridge/via/k8t890/k8t890.h> +#include <southbridge/via/k8t890/k8t890.h> int add_mainboard_resources(struct lb_memory *mem) { diff --git a/src/mainboard/broadcom/blast/mptable.c b/src/mainboard/broadcom/blast/mptable.c index 44bf7f2045..0c39b7a9e4 100644 --- a/src/mainboard/broadcom/blast/mptable.c +++ b/src/mainboard/broadcom/blast/mptable.c @@ -62,7 +62,6 @@ static void *smp_write_config_table(void *v) /*I/O APICs: APIC ID Version State Address*/ { device_t dev = 0; - int i; struct resource *res; for(i=0; i<3; i++) { dev = dev_find_device(0x1166, 0x0235, dev); diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c index f0163dd895..db1d0af223 100644 --- a/src/mainboard/broadcom/blast/romstage.c +++ b/src/mainboard/broadcom/blast/romstage.c @@ -50,10 +50,10 @@ static void memreset(int controllers, const struct mem_controller *ctrl) static inline void activate_spd_rom(const struct mem_controller *ctrl) { #define SMBUS_HUB 0x71 - int ret,i; unsigned device=(ctrl->channel0[0])>>8; smbus_send_byte(SMBUS_HUB, device); } + #if 0 static inline void change_i2c_mux(unsigned device) { @@ -99,10 +99,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) static const uint16_t spd_addr[] = { RC0|DIMM0, RC0|DIMM2, 0, 0, RC0|DIMM1, RC0|DIMM3, 0, 0, -#if CONFIG_MAX_PHYSICAL_CPUS > 1 RC1|DIMM0, RC1|DIMM2, 0, 0, RC1|DIMM1, RC1|DIMM3, 0, 0, -#endif }; int needs_reset; diff --git a/src/northbridge/amd/amdk8/setup_resource_map.c b/src/northbridge/amd/amdk8/setup_resource_map.c index 81beed2631..042bc9949b 100644 --- a/src/northbridge/amd/amdk8/setup_resource_map.c +++ b/src/northbridge/amd/amdk8/setup_resource_map.c @@ -112,7 +112,7 @@ static void setup_resource_map_x_offset(const unsigned int *register_values, int #endif } -#if defined(SOUTHBRIDGE_NVIDIA_MCP55) || defined(SOUTHBRIDGE_NVIDIA_CK804) +#if defined(CONFIG_SOUTHBRIDGE_NVIDIA_MCP55) || defined(CONFIG_SOUTHBRIDGE_NVIDIA_CK804) static void setup_resource_map_x(const unsigned int *register_values, int max) { int i; diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c index 25ad7baf32..fd2f3ed114 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c +++ b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c @@ -3,6 +3,7 @@ * by yinghai.lu@amd.com */ +#include <reset.h> static void bcm5785_enable_rom(void) { unsigned char byte; diff --git a/src/southbridge/intel/i82801ax/i82801ax_smbus.h b/src/southbridge/intel/i82801ax/i82801ax_smbus.h index e4ec70bc5f..06d987721f 100644 --- a/src/southbridge/intel/i82801ax/i82801ax_smbus.h +++ b/src/southbridge/intel/i82801ax/i82801ax_smbus.h @@ -110,24 +110,21 @@ static int do_smbus_read_byte(unsigned device, unsigned address) return byte; } -/* This function is neither used nor tested by me (Corey Osgood), the author -(Yinghai) probably tested/used it on i82801er */ static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd, unsigned data1, unsigned data2) { -#warning "do_smbus_write_block is commented out" - print_err("Untested smbus_write_block called\n"); -#if 0 unsigned char global_control_register; unsigned char global_status_register; unsigned char byte; unsigned char stat; int i; + print_err("Untested smbus_write_block called\n"); + /* Clear the PM timeout flags, SECOND_TO_STS */ - outw(inw(0x0400 + 0x66), 0x0400 + 0x66); + outw(inw(PMBASE_ADDR + 0x66), PMBASE_ADDR + 0x66); - if (smbus_wait_until_ready(SMBUS_IO_BASE) < 0) { + if (smbus_wait_until_ready() < 0) { return -2; } @@ -159,9 +156,8 @@ static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd, SMBUS_IO_BASE + SMBHSTCTL); for (i = 0; i < length; i++) { - /* Poll for transaction completion */ - if (smbus_wait_until_blk_done(SMBUS_IO_BASE) < 0) { + if (smbus_wait_until_blk_done() < 0) { return -3; } @@ -179,5 +175,4 @@ static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd, print_debug("SMBUS Block complete\n"); return 0; -#endif } |