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authorStefan Reinauer <stepan@openbios.org>2006-07-31 23:37:17 +0000
committerStefan Reinauer <stepan@openbios.org>2006-07-31 23:37:17 +0000
commit4278e99383c926e2056a92b4bebb885ee6fdbea6 (patch)
tree99c56d30d2e3227bc54bc41580b961e5b79f81d4
parentd7088c459c140d99a98e05c3be02e02592bb607e (diff)
downloadcoreboot-4278e99383c926e2056a92b4bebb885ee6fdbea6.tar.xz
Add support for SST39SF040 and SST39SF010A
apply C.-D. Hailfinger's patch for Winbond part (untested) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2354 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--util/flashrom/flash.h15
-rw-r--r--util/flashrom/flash_enable.c1
-rw-r--r--util/flashrom/flashchips.c6
3 files changed, 16 insertions, 6 deletions
diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h
index 6ec8e3110d..9375e5755e 100644
--- a/util/flashrom/flash.h
+++ b/util/flashrom/flash.h
@@ -38,11 +38,13 @@ extern struct flashchip flashchips[];
#define SHARP_ID 0xB0
#define SHARP_LHF00L04 0xCF
-#define SST_ID 0xBF /* SST Manufacturer ID code */
-#define SST_29EE020A 0x10 /* SST 29EE020 device code */
-#define SST_28SF040 0x04 /* SST 29EE040 device code */
-#define SST_39SF020 0xB6 /* SST 39SF020 device */
-#define SST_39VF020 0xD6 /* SST 39VF020 device */
+#define SST_ID 0xBF /* SST Manufacturer ID code */
+#define SST_29EE020A 0x10 /* SST 29EE020 device */
+#define SST_28SF040 0x04 /* SST 29EE040 device */
+#define SST_39SF010 0xB5 /* SST 39SF010A device */
+#define SST_39SF020 0xB6 /* SST 39SF020A device */
+#define SST_39SF040 0xB7 /* SST 39SF040 device */
+#define SST_39VF020 0xD6 /* SST 39VF020 device */
#define SST_49LF040B 0x50 /* SST 49LF040B device */
#define SST_49LF040 0x51 /* SST 49LF040 device */
#define SST_49LF080A 0x5B /* SST 48LF080A device */
@@ -51,7 +53,7 @@ extern struct flashchip flashchips[];
#define SST_49LF004A 0x60 /* SST 49LF004A device */
#define SST_49LF008A 0x5A /* SST 49LF008A device */
-#define PMC_ID 0x9D /* PMC Manufacturer ID[B code */
+#define PMC_ID 0x9D /* PMC Manufacturer ID code */
#define PMC_49FL002 0x6D /* PMC 49FL002 device code */
#define PMC_49FL004 0x6E /* PMC 49FL004 device code */
@@ -59,6 +61,7 @@ extern struct flashchip flashchips[];
#define W_29C011 0xC1 /* Winbond w29c011 device code */
#define W_29C020C 0x45 /* Winbond w29c020c device code */
#define W_39V040A 0x3D /* Winbond w39v040a device code */
+#define W_39V040B 0x54 /* Winbond w39v040b device code */
#define W_49F002U 0x0B /* Winbond w49F002u device code */
#define W_49V002A 0xB0 /* Winbond W49V002A device code */
#define W_49V002FA 0x32 /* Winbond W49V002FA device code */
diff --git a/util/flashrom/flash_enable.c b/util/flashrom/flash_enable.c
index d03a36b94a..ccd670a926 100644
--- a/util/flashrom/flash_enable.c
+++ b/util/flashrom/flash_enable.c
@@ -398,6 +398,7 @@ static FLASH_ENABLE enables[] = {
{0x10de, 0x0050, "NVIDIA CK804", enable_flash_ck804}, // LPC
{0x10de, 0x0051, "NVIDIA CK804", enable_flash_ck804}, // Pro
{0x10de, 0x00d3, "NVIDIA CK804", enable_flash_ck804}, // Slave, should not be here, to fix known bug for A01.
+ {0x10de, 0x0261, "NVIDIA C51", enable_flash_ck804},
{0x1002, 0x4377, "ATI SB400", enable_flash_sb400}, // ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80)
};
diff --git a/util/flashrom/flashchips.c b/util/flashrom/flashchips.c
index c5e3d9e369..dd937a74e1 100644
--- a/util/flashrom/flashchips.c
+++ b/util/flashrom/flashchips.c
@@ -52,8 +52,12 @@ struct flashchip flashchips[] = {
probe_jedec, erase_chip_jedec, write_jedec, NULL},
{"SST28SF040A", SST_ID, SST_28SF040, NULL, 512, 256,
probe_28sf040, erase_28sf040, write_28sf040, NULL},
+ {"SST39SF010A", SST_ID, SST_39SF010, NULL, 128, 4096,
+ probe_jedec, erase_chip_jedec, write_39sf020,NULL},
{"SST39SF020A", SST_ID, SST_39SF020, NULL, 256, 4096,
probe_jedec, erase_chip_jedec, write_39sf020,NULL},
+ {"SST39SF040", SST_ID, SST_39SF040, NULL, 512, 4096,
+ probe_jedec, erase_chip_jedec, write_39sf020,NULL},
{"SST39VF020", SST_ID, SST_39VF020, NULL, 256, 4096,
probe_jedec, erase_chip_jedec, write_39sf020,NULL},
// assume similar to 004B, ignoring data sheet
@@ -88,6 +92,8 @@ struct flashchip flashchips[] = {
probe_jedec, erase_chip_jedec, write_49f002, NULL},
{"W39V040A", WINBOND_ID, W_39V040A, NULL, 512, 64*1024,
probe_jedec, erase_chip_jedec, write_39sf020, NULL},
+ {"W39V040B", WINBOND_ID, W_39V040B, NULL, 512, 64*1024,
+ probe_jedec, erase_chip_jedec, write_39sf020, NULL},
{"M29F040B", ST_ID, ST_M29F040B, NULL, 512, 64 * 1024,
probe_29f040b, erase_29f040b, write_29f040b, NULL},
{"M29F400BT", ST_ID, ST_M29F400BT, NULL, 512, 64 * 1024,