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author | Ronald G. Minnich <rminnich@gmail.com> | 2003-06-24 14:04:03 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2003-06-24 14:04:03 +0000 |
commit | 432cc669840d110f671fe9fbf36a3a3477995b89 (patch) | |
tree | f919e18a5a1f2bd997a14003ec5d8169b8eaced9 | |
parent | 0044307756b994dd6add4e11b431f2fec3be4f2c (diff) | |
download | coreboot-432cc669840d110f671fe9fbf36a3a3477995b89.tar.xz |
arima updates
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@900 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | src/mainboard/arima/hdama/Config.lb | 7 | ||||
-rw-r--r-- | targets/arima/hdama/Config.lb | 43 |
2 files changed, 24 insertions, 26 deletions
diff --git a/src/mainboard/arima/hdama/Config.lb b/src/mainboard/arima/hdama/Config.lb index 2f871ea040..002018556d 100644 --- a/src/mainboard/arima/hdama/Config.lb +++ b/src/mainboard/arima/hdama/Config.lb @@ -17,11 +17,6 @@ if HAVE_PIRQ_TABLE object irq_tables.o end arch i386 end cpu k8 end # -option DEBUG=1 -default USE_FALLBACK_IMAGE=1 -option A=(1+2) -option B=0xa -# ### ### Build our 16 bit and 32 bit linuxBIOS entry code ### @@ -57,7 +52,7 @@ ldscript /arch/i386/lib/id.lds #### Things are delicate and we test to see if we should #### failover to another image. #### -option MAX_REBOOT_CNT=2 +#option MAX_REBOOT_CNT=2 ##ldscript arch/i386/lib/failover.lds USE_FALLBACK_IMAGE # ### diff --git a/targets/arima/hdama/Config.lb b/targets/arima/hdama/Config.lb index 02c956141c..4ef350c736 100644 --- a/targets/arima/hdama/Config.lb +++ b/targets/arima/hdama/Config.lb @@ -11,8 +11,10 @@ uses CONFIG_IOAPIC uses CONFIG_ROM_STREAM uses CONFIG_ROM_STREAM_START uses ENABLE_FIXED_AND_VARIABLE_MTRRS +uses FALLBACK_SIZE uses FINAL_MAINBOARD_FIXUP uses HAVE_FALLBACK_BOOT +uses HAVE_MP_TABLE uses HAVE_PIRQ_TABLE uses HEAP_SIZE uses IRQ_SLOT_COUNT @@ -34,6 +36,7 @@ uses USE_ELF_BOOT uses USE_FALLBACK_IMAGE uses USE_OPTION_TABLE +option HAVE_MP_TABLE=0 ### Customize our winbond superio chip for this motherboard ### option SIO_BASE=0x2e @@ -85,8 +88,8 @@ option ENABLE_FIXED_AND_VARIABLE_MTRRS=1 ### ### Clean up the motherboard id strings ### -option MAINBOARD_PART_NUMBER="Solo7" -option MAINBOARD_VENDOR="AMD" +#option MAINBOARD_PART_NUMBER="Solo7" +#option MAINBOARD_VENDOR="AMD" # ### ### Call the final_mainboard_fixup function @@ -103,27 +106,17 @@ option USE_OPTION_TABLE=!USE_FALLBACK_IMAGE ### Compute the location and size of where this firmware image ### (linuxBIOS plus bootloader) will live in the boot rom chip. ### -if USE_FALLBACK_IMAGE - option ROM_SECTION_SIZE = FALLBACK_SIZE - option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE) -end -if USE_NORMAL_IMAGE - option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) - option ROM_SECTION_OFFSET= 0 -end -# -### -### Compute the start location and size size of -### The linuxBIOS bootloader. -### -option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) -option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -option CONFIG_ROM_STREAM = 1 -# +#if USE_FALLBACK_IMAGE +# option ROM_SECTION_SIZE = FALLBACK_SIZE +# option ROM_SECTION_OFFSET= (ROM_SIZE - FALLBACK_SIZE) +#end +#if USE_NORMAL_IMAGE +# option ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) +# option ROM_SECTION_OFFSET= 0 +#end ### ### Compute where this copy of linuxBIOS will start in the boot rom ### -option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE) # ### ### Compute a range of ROM that can cached to speed up linuxBIOS, @@ -167,6 +160,16 @@ option HEAP_SIZE=0x10000 option ROM_SECTION_SIZE=ROM_SIZE option ROM_SECTION_OFFSET=0 +# +### +### Compute the start location and size size of +### The linuxBIOS bootloader. +### +option PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) +option CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) +option CONFIG_ROM_STREAM = 1 +option _ROMBASE = (CONFIG_ROM_STREAM_START + PAYLOAD_SIZE) +# # Arima hdama mainboard arima/hdama makedefine CFLAGS += -g |