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authorPatrick Georgi <pgeorgi@chromium.org>2016-07-30 13:08:32 +0200
committerPatrick Georgi <pgeorgi@google.com>2016-08-01 09:49:10 +0200
commit64f38acc29a82cc72ed5201e71e49b0fa785409b (patch)
tree64727b9b2e99752ec696ba5e1973a695703e0cce
parent4c18de2de918e96ceeca87d2fb51853c286548ee (diff)
downloadcoreboot-64f38acc29a82cc72ed5201e71e49b0fa785409b.tar.xz
siemens/sitemp_g1p1: Fix typo
Change-Id: I1c9af223d3598c4822905acce0cf9b1dca6ad1b6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1287066 Reviewed-on: https://review.coreboot.org/15981 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
-rw-r--r--src/mainboard/siemens/sitemp_g1p1/mainboard.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/siemens/sitemp_g1p1/mainboard.c b/src/mainboard/siemens/sitemp_g1p1/mainboard.c
index 810f7e01fd..f01420f928 100644
--- a/src/mainboard/siemens/sitemp_g1p1/mainboard.c
+++ b/src/mainboard/siemens/sitemp_g1p1/mainboard.c
@@ -740,7 +740,7 @@ static void detect_hw_variant( device_t dev )
}
// restore changes made for device 2
dev2->bus->secondary = secondary;
- dev2->bus->secondary = subordinate;
+ dev2->bus->subordinate = subordinate;
pci_write_config32(dev2, PCI_PRIMARY_BUS, pci_primary_bus);
}
break;