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authorYinghai Lu <yinghailu@gmail.com>2005-01-21 22:58:15 +0000
committerYinghai Lu <yinghailu@gmail.com>2005-01-21 22:58:15 +0000
commit6a2798d28be226d4b037dd1f694d0434034b0eea (patch)
treec5e362b7f25d0b75f8fe4046a4f37a8203241719
parentb5d9af41053f2cd66503b6e8a58676e97a3bbf85 (diff)
downloadcoreboot-6a2798d28be226d4b037dd1f694d0434034b0eea.tar.xz
move apic cluster before pci_domain in MB Config.lb
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1897 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c24
1 files changed, 13 insertions, 11 deletions
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 6fd4cf96ce..3d30430d3c 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -721,7 +721,7 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max)
{
struct bus *cpu_bus;
device_t dev_mc;
- int i;
+ int i, j;
int enable_apic_ext_id = 0;
int bsp_apic_id = lapicid(); // bsp apicid
int apic_id_offset = bsp_apic_id;
@@ -745,16 +745,18 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max)
dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3));
if(!dev) {
// in case in mb Config.lb we move apic cluster before pci_domain and not set that for second CPU
- struct device dummy;
- uint32_t id;
- dummy.bus = dev_mc->bus;
- dummy.path.type = DEVICE_PATH_PCI;
- dummy.path.u.pci.devfn = PCI_DEVFN(0x18 + i, 3);
- id = pci_read_config32(&dummy, PCI_VENDOR_ID);
- if (id != 0xffffffff && id != 0x00000000 &&
- id != 0x0000ffff && id != 0xffff0000) {
- //create that for it
- dev = alloc_dev(dev_mc->bus, &dummy.path);
+ for(j=0; j<4; j++) {
+ struct device dummy;
+ uint32_t id;
+ dummy.bus = dev_mc->bus;
+ dummy.path.type = DEVICE_PATH_PCI;
+ dummy.path.u.pci.devfn = PCI_DEVFN(0x18 + i, j);
+ id = pci_read_config32(&dummy, PCI_VENDOR_ID);
+ if (id != 0xffffffff && id != 0x00000000 &&
+ id != 0x0000ffff && id != 0xffff0000) {
+ //create that for it
+ dev = alloc_dev(dev_mc->bus, &dummy.path);
+ }
}
}