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| author | Iru Cai <mytbk920423@gmail.com> | 2018-12-26 20:41:38 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-11-17 15:10:45 +0800 |
| commit | 6a642c2acdb36efa89ad8bfb0e9a1798dcc79f9a (patch) | |
| tree | 11894548a089669050cd6e1bf0c8e3fa013773e9 | |
| parent | 8abb0a2bd2cc3144f7193d519cf4516c8db4182b (diff) | |
| download | coreboot-6a642c2acdb36efa89ad8bfb0e9a1798dcc79f9a.tar.xz | |
small update of _pei_ram_param
| -rw-r--r-- | src/northbridge/intel/haswell/do_raminit_frag.c | 6 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/pei_ram.h | 4 |
2 files changed, 6 insertions, 4 deletions
diff --git a/src/northbridge/intel/haswell/do_raminit_frag.c b/src/northbridge/intel/haswell/do_raminit_frag.c index 83e6718cee..49c8227eed 100644 --- a/src/northbridge/intel/haswell/do_raminit_frag.c +++ b/src/northbridge/intel/haswell/do_raminit_frag.c @@ -469,9 +469,9 @@ void fill_ram_param(pei_ram_param *param, struct pei_data *pd) { memset(param, 0, sizeof(pei_ram_param)); param->v00 = 1; - param->v03[0] = 1; - param->v03[14] = 1; - param->v03[0x21] = 1; + param->v03 = 1; + param->v08[9] = 1; + param->v08[0x1c] = 1; param->chan0_disabled = pd->dimm_channel0_disabled; param->chan1_disabled = pd->dimm_channel1_disabled; param->v2c[0] = 1; diff --git a/src/northbridge/intel/haswell/pei_ram.h b/src/northbridge/intel/haswell/pei_ram.h index f8b0394a17..2d9bdcbb43 100644 --- a/src/northbridge/intel/haswell/pei_ram.h +++ b/src/northbridge/intel/haswell/pei_ram.h @@ -24,7 +24,9 @@ struct _pei_ram_param { uint8_t v00; // 0x00 uint16_t max_ddr3_freq; // 0x01 - uint8_t v03[0x27]; // 0x03 + uint8_t v03; + uint32_t v04; + uint8_t v08[0x22]; uint8_t chan0_disabled; // 0x2a uint8_t chan1_disabled; // 0x2b uint8_t v2c[0x2b]; // 0x2c |