diff options
| author | Iru Cai <mytbk920423@gmail.com> | 2019-01-12 14:43:08 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-11-17 15:10:47 +0800 |
| commit | 800673f9e97722cf7c0fe6c0eefb4fb12585e5f6 (patch) | |
| tree | cdc600888ad75ddcb758caa4e6fb14f478148e15 | |
| parent | f9655b29c5f32eb204eb2eb32f5b375585310b21 (diff) | |
| download | coreboot-800673f9e97722cf7c0fe6c0eefb4fb12585e5f6.tar.xz | |
fix EHCI PDO setting code
| -rw-r--r-- | src/northbridge/intel/haswell/pei_usb.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/src/northbridge/intel/haswell/pei_usb.c b/src/northbridge/intel/haswell/pei_usb.c index 626a6c4971..e88e42afd2 100644 --- a/src/northbridge/intel/haswell/pei_usb.c +++ b/src/northbridge/intel/haswell/pei_usb.c @@ -416,7 +416,7 @@ static void frag_usb_fffaf7d8(PEI_USB *upd) for (int i = 0; i < nb_usb2_ports(); i++) { if (i <= 7 && (upd->xhci_resume_info[0] & 1)) { - if (upd->ehci_settings[i].enable & 1) { + if ((upd->ehci_settings[i].enable & 1) == 0) { pci_or_config8(PCI_DEV(0, 0x1d, 0), 0x64, (1 << i)); } else { pci_update_config8(PCI_DEV(0, 0x1d, 0), 0x64, (~(1 << i)), 0); @@ -430,7 +430,7 @@ static void frag_usb_fffaf7d8(PEI_USB *upd) if ((upd->xhci_resume_info[1] & 1) == 0) continue; - if (upd->ehci_settings[i].enable & 1) { + if ((upd->ehci_settings[i].enable & 1) == 0) { pci_or_config8(PCI_DEV(0, 0x1a, 0), 0x64, 1 << (i - 8)); } else { pci_update_config8(PCI_DEV(0, 0x1a, 0), 0x64, ~(1 << (i - 8)), 0); @@ -471,11 +471,8 @@ static void set_usb_pdo(PEI_USB *upd, u8 ppiv) } else { shifts = i; } - /* if usb2 port is enabled, prevents it from - * reporting a device connection to the xHC, - * otherwise allows the reporting - */ - if (upd->ehci_settings[i].enable & 1) { + + if ((upd->ehci_settings[i].enable & 1) == 0) { usb2pdo |= (1 << shifts); } else { usb2pdo &= ~(1 << shifts); |