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| author | Rudolf Marek <r.marek@assembler.cz> | 2011-02-26 19:46:08 +0000 |
|---|---|---|
| committer | Rudolf Marek <r.marek@assembler.cz> | 2011-02-26 19:46:08 +0000 |
| commit | 837403dddf7b05b1a2b1a09a2cd57975484c7568 (patch) | |
| tree | ee426d591b76e1e6bf61e5e428bac4eb7d88da41 | |
| parent | 656060d1d944c4deab16102fffb7f3d2806574f7 (diff) | |
| download | coreboot-837403dddf7b05b1a2b1a09a2cd57975484c7568.tar.xz | |
Following patch fills in the callbacks for PCIe x16 resets. This board uses GPM8,GPM9 as reset toggles.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/mainboard/asrock/939a785gmh/mainboard.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/mainboard/asrock/939a785gmh/mainboard.c b/src/mainboard/asrock/939a785gmh/mainboard.c index 09ace66fca..c7eedeafb8 100644 --- a/src/mainboard/asrock/939a785gmh/mainboard.c +++ b/src/mainboard/asrock/939a785gmh/mainboard.c @@ -35,12 +35,31 @@ uint64_t uma_memory_base, uma_memory_size; void set_pcie_dereset(void); void set_pcie_reset(void); u8 is_dev3_present(void); + +static void pcie_rst_toggle(u8 val) { + u8 byte; + + byte = pm_ioread(0x8d); + byte &= ~(3 << 1); + pm_iowrite(0x8d, byte); + + byte = pm_ioread(0x94); + /* Output enable */ + byte &= ~(3 << 2); + /* Toggle GPM8, GPM9 */ + byte &= ~(3 << 0); + byte |= val; + pm_iowrite(0x94, byte); +} + void set_pcie_dereset() { + pcie_rst_toggle(0x3); } void set_pcie_reset() { + pcie_rst_toggle(0x0); } #if 0 /* not tested yet */ |