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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2019-01-09 00:24:07 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-04-08 14:11:04 +0000 |
| commit | 83bb2d44b59a77c174bc8d57822e2885bbfcae83 (patch) | |
| tree | 756f47013e7a17b6c0f70e4f36f8d2c86090e86f | |
| parent | 8bd5c996ab96b34e1654a88a98d1c9a957b0b478 (diff) | |
| download | coreboot-83bb2d44b59a77c174bc8d57822e2885bbfcae83.tar.xz | |
src/soc/intel/fsp_baytrail/smm.c: add bootstate entry for locking SMI
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Ia296a680217a38136c063cae6ed619df0c497795
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30753
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/soc/intel/fsp_baytrail/smm.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/fsp_baytrail/smm.c b/src/soc/intel/fsp_baytrail/smm.c index 94b09449c0..df55433314 100644 --- a/src/soc/intel/fsp_baytrail/smm.c +++ b/src/soc/intel/fsp_baytrail/smm.c @@ -20,6 +20,7 @@ #include <arch/io.h> #include <device/mmio.h> #include <cpu/x86/smm.h> +#include <bootstate.h> #include <soc/iomap.h> #include <soc/pmc.h> #include <soc/smm.h> @@ -123,3 +124,16 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1) "d" (APM_CNT) ); } + +static void finalize_chipset(void *unused) +{ + printk(BIOS_DEBUG, "Finalizing SMM.\n"); + /* Lock sleep stretching policy and set SMI lock. */ + write32((void *)(PMC_BASE_ADDRESS + GEN_PMCON2), + read32((void *)(PMC_BASE_ADDRESS + GEN_PMCON2)) + | SLPSX_STR_POL_LOCK | SMI_LOCK); + outb(APM_CNT_FINALIZE, APM_CNT); +} + +BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, finalize_chipset, NULL); +BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, finalize_chipset, NULL); |