diff options
author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-08-24 22:38:56 +0200 |
---|---|---|
committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-08-25 08:32:36 +0200 |
commit | 96555bf4deee042c89bb28dac79303bc28b41686 (patch) | |
tree | 41561224a1c0de43b1ce0b3f52f1aa5280db8391 | |
parent | 7cf3d226e225bdea9d9cf8f2c85ede64710e06b5 (diff) | |
download | coreboot-96555bf4deee042c89bb28dac79303bc28b41686.tar.xz |
lenovo/x230: Add subsystem ids.
Change-Id: I917a89da50d8efe998c368ba46206f2a1c580fd0
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6756
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
-rw-r--r-- | src/mainboard/lenovo/x230/devicetree.cb | 60 |
1 files changed, 47 insertions, 13 deletions
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb index 1a93ad8828..9dc559c76d 100644 --- a/src/mainboard/lenovo/x230/devicetree.cb +++ b/src/mainboard/lenovo/x230/devicetree.cb @@ -39,9 +39,13 @@ chip northbridge/intel/sandybridge end device domain 0 on - device pci 00.0 on end # host bridge + device pci 00.0 on + subsystemid 0x17aa 0x21fa + end # host bridge device pci 01.0 off end # PCIe Bridge for discrete graphics - device pci 02.0 on end # vga controller + device pci 02.0 on + subsystemid 0x17aa 0x21fa + end # vga controller chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "pirqa_routing" = "0x8b" @@ -73,25 +77,50 @@ chip northbridge/intel/sandybridge # Enable zero-based linear PCIe root port functions register "pcie_port_coalesce" = "1" - device pci 14.0 on end # USB 3.0 Controller - device pci 16.0 on end # Management Engine Interface 1 + device pci 14.0 on + subsystemid 0x17aa 0x21fa + end # USB 3.0 Controller + device pci 16.0 on + subsystemid 0x17aa 0x21fa + end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT - device pci 19.0 on end # Intel Gigabit Ethernet - device pci 1a.0 on end # USB2 EHCI #2 - device pci 1b.0 on end # High Definition Audio - device pci 1c.0 on end # PCIe Port #1 - device pci 1c.1 on end # PCIe Port #2 - device pci 1c.2 on end # PCIe Port #3 (expresscard) + device pci 19.0 on + subsystemid 0x17aa 0x21f3 + end # Intel Gigabit Ethernet + device pci 1a.0 on + subsystemid 0x17aa 0x21fa + end # USB2 EHCI #2 + device pci 1b.0 on + subsystemid 0x17aa 0x21fa + end # High Definition Audio + device pci 1c.0 on + subsystemid 0x17aa 0x21fa + device pci 00.0 on + subsystemid 0x17aa 0x21fa + end + device pci 00.1 on + subsystemid 0x17aa 0x21fa + end + end # PCIe Port #1 + device pci 1c.1 on + subsystemid 0x17aa 0x21fa + end # PCIe Port #2 + device pci 1c.2 on + subsystemid 0x17aa 0x21fa + end # PCIe Port #3 (expresscard) device pci 1c.3 off end # PCIe Port #4 device pci 1c.4 off end # PCIe Port #5 device pci 1c.5 off end # PCIe Port #6 device pci 1c.6 off end # PCIe Port #7 device pci 1c.7 off end # PCIe Port #8 - device pci 1d.0 on end # USB2 EHCI #1 + device pci 1d.0 on + subsystemid 0x17aa 0x21fa + end # USB2 EHCI #1 device pci 1e.0 off end # PCI bridge device pci 1f.0 on #LPC bridge + subsystemid 0x17aa 0x21fa chip ec/lenovo/pmh7 device pnp ff.1 on # dummy end @@ -132,8 +161,11 @@ chip northbridge/intel/sandybridge register "evente_enable" = "0x0d" end end # LPC bridge - device pci 1f.2 on end # SATA Controller 1 + device pci 1f.2 on + subsystemid 0x17aa 0x21fa + end # SATA Controller 1 device pci 1f.3 on + subsystemid 0x17aa 0x21fa # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c device i2c 54 on end @@ -147,7 +179,9 @@ chip northbridge/intel/sandybridge end end # SMBus device pci 1f.5 off end # SATA Controller 2 - device pci 1f.6 on end # Thermal + device pci 1f.6 on + subsystemid 0x17aa 0x21fa + end # Thermal end end end |